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Datasheet AUIRL7732S2TR, AUIRL7732S2TR1 (International Rectifier) - 7

ПроизводительInternational Rectifier
ОписаниеAutomotive Grade. DirectFET Power MOSFET
Страниц / Страница11 / 7 — Notes on Repetitive Avalanche Curves , Figures 16, 17:. (For further …
Формат / Размер файлаPDF / 221 Кб
Язык документаанглийский

Notes on Repetitive Avalanche Curves , Figures 16, 17:. (For further info, see AN-1005 at www.irf.com)

Notes on Repetitive Avalanche Curves , Figures 16, 17: (For further info, see AN-1005 at www.irf.com)

A 40V Automotive Grade Single N-Channel HEXFET Power MOSFET in a DirectFET SC package rated at 58 amperes optimized with low...
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International Rectifier
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AUIRL7732S2TR/TR1
Notes on Repetitive Avalanche Curves , Figures 16, 17:
30
(For further info, see AN-1005 at www.irf.com)
TOP Single Pulse 1. Avalanche failures assumption: BOTTOM 1.0% Duty Cycle Purely a thermal phenomenon and failure occurs at a ) 25 I temperature far in excess of T J jmax. This is validated for D = 35A m( every part type. y 2. Safe operation in Avalanche is allowed as long asT g jmax is r 20 e not exceeded. n E 3. Equation below based on circuit and waveforms shown in e Figures 18a, 18b. h 15 cn 4. PD (ave) = Average power dissipation per single al avalanche pulse. av 5. BV = Rated breakdown voltage (1.3 factor accounts for A 10 , voltage increase during avalanche). R A 6. Iav = Allowable avalanche current. E 5 7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 16, 17). tav = Average time in avalanche. 0 D = Duty cycle in avalanche = tav ·f 25 50 75 100 125 150 175 ZthJC(D, tav) = Transient thermal resistance, see figure 15) Starting TJ , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) =
D
T/ ZthJC Fig 17.
Maximum Avalanche Energy vs. Temperature
Iav = 2
D
T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
15V V(BR)DSS tp L V DRIVER DS RG D.U.T + - VDD IAS A V 20V GS t 0.01 p Ω IAS
Fig 18a.
Unclamped Inductive Test Circuit
Fig 18b.
Unclamped Inductive Waveforms Id Vds L Vgs VCC DUT 0 1K S 20K Vgs(th)
Fig 19a.
Gate Charge Test Circuit Qgodr Qgd Qgs2 Qgs1 R V D DS
Fig 19b.
Gate Charge Waveform VGS D.U.T. VDS RG + 90% - VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10% VGS td(on) tr td(off) tf
Fig 20a.
Switching Time Test Circuit
Fig 20b.
Switching Time Waveforms www.irf.com 7
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