Datasheet CA3280, CA3280A (Intersil) - 4

CA3280, CA3280A
Test Circuits and Waveforms V+ +30V INPUT 0.1

F 14 16 + 14 OUTPUT 30V 1/2 13 I 15 CA3280 0V - - 1/2 13 15 3 CA3280 TEST POINT + 16 4 30k 4 0.1 1k 10k

F 1 V- V+ 3 30k 1k FIGURE 1. LEAKAGE CURRENT TEST CIRCUIT FIGURE 2. CHANNEL SEPARATION TEST CIRCUIT V+ 15V 14 10k 16 1/2 IOUT CA3280 13 10k 15 4 3 1k 1 V- -15V VIN IABC
I
I
ABC = 650A, ID = 200A; Vertical = 200A/Div.;
DIODE
Horizontal = 1V/Div.
FIGURE 3A. EFFECTS OF DIODE LINEARIZATION, WITH DIODE PROGRAMMING TERMINAL ACTIVE V+ 15V 11 10k 9 1/2 CA3280 12 10k IOUT 10 6 4 1k 8 IDIODE IABC V- -15V VIN
IABC = 650A; ID = 0; Vertical = 200A/Div.; Horizontal = 25mV/Div.
FIGURE 3B. WITH DIODE PROGRAMMING TERMINAL CUTOFF FIGURE 3. CA3280 TRANSFER CHARACTERISTICS
FN1174 Rev 6.00 Page 4 of 10 May 2002