74HC4060; 74HCT406014-stage binary ripple counter with oscillatorRev. 5 — 8 May 2020Product data sheet1. General description The 74HC4060; 74HCT4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscil ator terminals (RS, RTC and CTC), ten buf ered paral el outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscil ator pins (RTC and CTC) floating. The counter advances on the HIGH-to-LOW transition of RS. A HIGH level on MR clears all counter stages and forces all outputs LOW, independent of the other input conditions. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • All active components on chip • RC or crystal oscillator configuration • Complies with JEDEC standard no. 7 A • Input levels: • For 74HC4060: CMOS level • For 74HCT4060: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Applications • Control counters • Timers • Frequency dividers • Time-delay circuits Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1. Pinning 6.2. Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1. Waveforms and test circuit 12. RC oscillator 12.1. Timing component limitations 12.2. Typical crystal oscillator circuit 13. Package outline 14. Abbreviations 15. Revision history 16. Legal information Contents
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