Data SheetAD5751ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Transient currents of up to Stresses at or above those listed under Absolute Maximum 100 mA do not cause SCR latch-up. Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these Table 4. or any other conditions above those indicated in the Parameter Rating operational section of this specification is not implied. AVDD to GND −0.3 V to +58 V Operation beyond the maximum operating conditions for DVCC to GND −0.3 V to +7 V extended periods may affect product reliability. Digital Inputs to GND −0.3 V to DVCC + 0.3 V, or 7 V (whichever is less) ESD CAUTION Digital Outputs to GND −0.3 V to DVCC + 0.3 V, or 7 V (whichever is less) VREF to GND −0.3 V to +7 V VSENSE+ to GND −0.3 V to AVDD VIN to GND −0.3 V to +7 V VOUT, IOUT to GND −0.3 V to AVDD Operating Temperature Range Industrial −40°C to +105°C Storage Temperature Range −65°C to +150°C Junction Temperature (TJ max) 125°C 32-Lead LFCSP Package θJA Thermal Impedance1 42°C/W Lead Temperature JEDEC industry standard Soldering J-STD-020 1 Simulated data based on a JEDEC 2s2p test board with thermal vias. Rev. E | Page 9 of 32 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Current Output Terminology Theory of Operation Software Mode Currrent Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5751 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide
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