Datasheet ADL9005 (Analog Devices) - 5

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Data Sheet ADL9005 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Rating
Thermal performance is directly linked to printed circuit board V (PCB) design and operating environment. Careful attention to DD 7 V RF PCB thermal design is required. IN Power 22 dBm Continuous Power Dissipation (PDISS), 1.125 W θJC is the junction to case thermal resistance. TA = 85°C (Derate 12.5 mW/°C Above 85°C) Temperature
Table 6. Thermal Resistance
Peak Reflow, Moisture Sensitivity Level (MSL)1 260°C
Package θJC Unit
Junction to Maintain 1,000,000 Hour 175°C CP-24-15 80 °C/W Meant Time to Failure (MTTF) Nominal Junction (TA = 85°C, VDD = 5 V, 117°C
ELECTROSTATIC DISCHARGE (ESD) RATINGS
IDQ = 80 mA) The fol owing ESD information is provided for handling of Storage Range −65°C to +150°C ESD sensitive devices in an ESD protected area only. Operating Range −40°C to +85°C Human body model (HBM) per ANSI/ESDA/JEDEC JS-001. 1 See the Ordering Guide for more information. Stresses at or above those listed under Absolute Maximum
ESD Ratings for ADL9005
Ratings may cause permanent damage to the product. This is a
Table 7. ADL9005, 24-Lead LFCSP
stress rating only; functional operation of the product at these
ESD Model Withstand Threshold (V) Class
or any other conditions above those indicated in the operational HBM ±250 1A section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may
ESD CAUTION
affect product reliability. Rev. 0 | Page 5 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 0.01 GHz TO 14 GHz 14 GHz TO 20 GHz 20 GHz TO 26.5 GHz DC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings for ADL9005 ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS BIASING THROUGH THE ACG4/VDD2 PIN THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS BIASING THE ADL9005 BY USING THE LTM8020 PROVIDING DRAIN BIAS PROVIDING DRAIN BIAS THROUGH THE ACG4/VDD2 PIN POWER-UP AND POWER-DOWN SEQUENCING OUTLINE DIMENSIONS ORDERING GUIDE