Datasheet ADA4312-1 (Analog Devices) - 6

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ADA4312-1 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS
The figures in this section refer to the test circuit shown in Figure 16, unless otherwise noted.
27 30 GAIN = 16V/V 24 27 21 GAIN = 12V/V 18 24 ) GAIN = 8V/V ) 15 dB dB 21 ( 12 ( IN GAIN = 4V/V IN 9 18 GA GA 6 15 3 -LOOP COMMON-MODE -LOOP D 0 D 12 E E –3 9 LOS LOS –6 C C –9 6 –12 3 –15 –18 0
005
1 10 100 1000 1 10 100 1000
004
FREQUENCY (MHz) FREQUENCY (MHz)
11044- 11044- Figure 4. Small Signal Differential and Common-Mode Frequency Response Figure 7. Large Signal Differential Frequency Response, Gain = +16 V/V, Differential VOUT = 5 V p-p
–40 10k 732Ω –50 ) 1.1Ω –60 ) /√Hz Hz –70 nV 97.6Ω 40.2Ω ( Bm/ E 1k d –80 R ( OIS 1.1Ω E N W –90 O GE P 732Ω IT –100 M OLTA 100 –110 T V U RANS T –120 TP OU –130 –140 10
020
0 10 20 30 40 50 60 70 80 90 100
006
1 10 100 1k 10k 100k 1M 10M 100M 1G FREQUENCY (MHz) FREQUENCY (Hz)
11044- 11044- Figure 5. G.hn Transmit Spectrum, 16 dBm into 40 Ω Differential Figure 8. Differential Output Voltage Noise vs. Frequency, Gain = +16 V/V
100 100 80 80 OUT B OUT A V) 60 V) 60 E (m E (m D 40 D 40 U U IT IT 20 20 MPL MPL 0 0 SE A SE A L –20 L –20 PU PU T –40 T –40 PU PU T OUT A T OUT B U –60 U –60 O O –80 –80 –100 –100
023
–80 –40 0 40 80 120 160 200 240 280 320
022
–80 –40 0 40 80 120 160 200 240 280 320 TIME (ns) TIME (ns)
11044- 11044- Figure 6. Small Signal Output Transient Response, Normalized to 0 V, Figure 9. Small Signal Output Transient Response, Normalized to 0 V, 10 ns Rise Time, 10 ns Fall Time, 1 µs Pulse Width, 10% Duty Cycle 10 ns Rise Time, 10 ns Fall Time, 1 µs Pulse Width, 10% Duty Cycle Rev. A | Page 6 of 12 Document Outline Features Applications General Description Functional Block Diagram Typical Application Circuit Revision History Specifications Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Applications Information Feedback Resistor Selection General Operation Half-Duplex Operation Establishing VMID Bias Control and Linearity PCB Layout Thermal Management Power Supply Bypassing Evaluation Board Outline Dimensions Ordering Guide