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Datasheet AD8253 (Analog Devices) - 2

ПроизводительAnalog Devices
Описание10 MHz, G = 1, 10, 100, 1000 iCMOS Programmable Gain Instrumentation Amplifier
Страниц / Страница24 / 2 — AD8253. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 10/12—Rev. A to …
ВерсияB
Формат / Размер файлаPDF / 426 Кб
Язык документаанглийский

AD8253. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 10/12—Rev. A to Rev. B. 8/08—Rev. 0 to Rev. A

AD8253 Data Sheet TABLE OF CONTENTS REVISION HISTORY 10/12—Rev A to Rev B 8/08—Rev 0 to Rev A

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AD8253 Data Sheet TABLE OF CONTENTS
Features .. 1 Power Supply Regulation and Bypassing .. 18 Applications ... 1 Input Bias Current Return Path ... 18 General Description ... 1 Input Protection ... 18 Functional Block Diagram .. 1 Reference Terminal .. 19 Revision History ... 2 Common-Mode Input Voltage Range ... 19 Specifications ... 3 Layout .. 19 Timing Diagram ... 5 RF Interference ... 19 Absolute Maximum Ratings .. 6 Driving an Analog-to-Digital Converter .. 20 Maximum Power Dissipation ... 6 Applications Information .. 21 ESD Caution .. 6 Differential Output .. 21 Pin Configuration and Function Descriptions ... 7 Setting Gains with a Microcontroller .. 21 Typical Performance Characteristics ... 8 Data Acquisition ... 22 Theory of Operation .. 16 Outline Dimensions ... 23 Gain Selection ... 16 Ordering Guide .. 23
REVISION HISTORY 10/12—Rev. A to Rev. B
Changed Digital Input Voltage Low Maximum Parameter from 1.2 V to 2.1 V and Changed Digital Input Voltage High Typical Parameter from 1.5 V to 2.8 V .. 4 Updated Outline Dimensions ... 23
8/08—Rev. 0 to Rev. A
Changes to Ordering Guide .. 23
7/08—Revision 0: Initial Version
Rev. B | Page 2 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ANALOG-TO-DIGITAL CONVERTER APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE
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