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Datasheet 24C01C (Microchip) - 8

ПроизводительMicrochip
Описание1K 5.0V I2C Serial EEPROM
Страниц / Страница36 / 8 — 24C01C. 5.0. DEVICE ADDRESSING. FIGURE 5-1:. CONTROL BYTE FORMAT. 5.1. …
Формат / Размер файлаPDF / 981 Кб
Язык документаанглийский

24C01C. 5.0. DEVICE ADDRESSING. FIGURE 5-1:. CONTROL BYTE FORMAT. 5.1. Contiguous Addressing Across. Multiple Devices

24C01C 5.0 DEVICE ADDRESSING FIGURE 5-1: CONTROL BYTE FORMAT 5.1 Contiguous Addressing Across Multiple Devices

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24C01C 5.0 DEVICE ADDRESSING FIGURE 5-1: CONTROL BYTE FORMAT
A control byte is the first byte received following the Start condition from the master device (Figure 5-1). Read/Write Bit The control byte consists of a four-bit control code; for the 24C01C this is set as ‘1010’ binary for read and Chip Select write operations. The next three bits of the control byte Control Code Bits are the Chip Select bits (A2, A1, A0). The Chip Select bits allow the use of up to eight 24C01C devices on the S 1 0 1 0 A2 A1 A0 R/W ACK same bus and are used to select which device is accessed. The Chip Select bits in the control byte must correspond to the logic levels on the corresponding A2, Slave Address A1 and A0 pins for the device to respond. These bits Start Bit Acknowledge Bit are in effect the three Most Significant bits of the word address. For the SOT-23 package, the A2 address pin is not
5.1 Contiguous Addressing Across
available. During device addressing, the A2 Chip
Multiple Devices
Select bit should be set to ‘0’. The Chip Select bits A2, A1, A0 can be used to expand The last bit of the control byte defines the operation to the contiguous address space for up to 8K bits by be performed. When set to a ‘1’ a read operation is adding up to eight 24C01C devices on the same bus. selected, and when set to a ‘0’ a write operation is In this case, software can use A0 of the control byte as selected. Following the Start condition, the 24C01C address bit A8, A1 as address bit A9, and A2 as monitors the SDA bus checking the control byte being address bit A10. It is not possible to sequentially read transmitted. Upon receiving a ‘1010’ code and appro- across device boundaries. priate Chip Select bits, the slave device outputs an Acknowledge signal on the SDA line. Depending on the For the SOT-23 package, up to four 24C01C devices state of the R/W bit, the 24C01C will select a read or can be added for up to 4K bits of address space. In this write operation. case, software can use A0 of the control byte as address bit A8, and A1 as address bit A9. It is not pos- sible to sequentially read across device boundaries. DS21201K-page 8  1997-2012 Microchip Technology Inc. Document Outline 24C01C Features: Description: Block Diagram Package Types 1.0 Electrical Characteristics Absolute Maximum Ratings(†) TABLE 1-1: DC Characteristics TABLE 1-2: AC Characteristics FIGURE 1-1: Bus Timing Data 2.0 Pin Descriptions TABLE 2-1: Pin Function Table 2.1 SDA Serial Data 2.2 SCL Serial Clock 2.3 A0, A1, A2 2.4 Test 2.5 Noise Protection 3.0 Functional Description 4.0 Bus Characteristics 4.1 Bus Not Busy (A) 4.2 Start Data Transfer (B) 4.3 Stop Data Transfer (C) 4.4 Data Valid (D) 4.5 Acknowledge FIGURE 4-1: Data Transfer Sequence on the Serial Bus FIGURE 4-2: Acknowledge Timing 5.0 Device Addressing FIGURE 5-1: Control Byte Format 5.1 Contiguous Addressing Across Multiple Devices 6.0 Write Operations 6.1 Byte Write 6.2 Page Write FIGURE 6-1: Byte Write FIGURE 6-2: Page Write 7.0 Acknowledge Polling FIGURE 7-1: Acknowledge Polling Flow 8.0 Read Operation 8.1 Current Address Read FIGURE 8-1: Current Address Read 8.2 Random Read 8.3 Sequential Read FIGURE 8-2: Random Read FIGURE 8-3: Sequential Read 9.0 Packaging Information 9.1 Package Marking Information Appendix A: Revision History The Microchip Web Site Customer Change Notification Service Customer Support Reader Response Product Identification System Trademarks Worldwide Sales
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