Datasheet MAX25610A, MAX25610B (Maxim) - 2

MAX25610A/MAX25610B Synchronous Buck and Buck-Boost LED Driver/DC-DC Converter
Absolute Maximum Ratings
INP to PGND ...-0.3V to +40V FLT to INN ..-0.3V to +6.0V INP to LX ...-0.3V to +40V Short-Circuit Between VCC and AGND ...Continuous LX to PGND...-0.3V to +40V Continuous Power Dissipation (Multilayer Board) TSSOP-EP VCC to AGND ...-0.3V to +6.0V (TA = +70°C, derate 26.1mW/°C above +70°C) ..2088mW BST to LX ...-0.3V to +6.0V Continuous Power Dissipation (Multilayer Board) TQFN-EP INP to INN ...-0.3V to +40V (TA = +70°C, derate 33.3mW/°C above +70°C) ..2667mW PGND to AGND ..-0.3V to +0.3V Operating Temperature Range ... -40°C to +125°C PWMFRQ, OUT to AGND ...-0.3V to VCC + 0.3V Junction Temperature ..+150°C REFI, COMP to AGND ..-0.3V to VCC + 0.3V Storage Temperature Range .. -40°C to +150°C FB to AGND...-0.3V to +16V Soldering Temperature (reflow) ...+260°C INN to AGND ...-0.3V to +24V LX Continuous RMS Current (per pin) ...1.5A VEE, PWMDIM to INN ..-0.3V to +6.0V INP, PGND Continuous RMS Current ..2.5A Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information TSSOP PACKAGE CODE U16E+3C
Outline Number
21-0108
Land Pattern Number
90-0120 Thermal Resistance, Single-Layer Board:
Junction-to-Ambient (θJA) 47°C/W Junction-to-Case Thermal Resistance (θJC) 3°C/W
Thermal Resistance, Four Layer Board:
Junction-to-Ambient (θJA) 38.3°C/W Junction-to-Case Thermal Resistance (θJC) 3°C/W
TQFN PACKAGE CODE T1655Y+3C
Outline Number
21-100279
Land Pattern Number
90-0072 Thermal Resistance, Single-Layer Board:
Junction-to-Ambient (θJA) 48°C/W Junction-to-Case Thermal Resistance (θJC) 2°C/W
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θJA) 30°C/W Junction-to-Case Thermal Resistance (θJC) 2°C/W For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages
. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial
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