HMC628LP4 / 628LP4E v07.0410 BiCMOS MMIC 5-Bit DIGITALVARIABLE GAIN AMPLIFIER, 50 - 800 MHzSerial Control Interface The HMC628LP4(E) contains a 3-wire SPI compatible digital interface (DATA, CLK, LE). It is activated when P/S is kept high. The 5-bit serial word must be loaded MSB fi rst. The positive-edge sensitive CLK and LE requires clean transitions. Standard logic families work well. If mechanical switches were used, sufficient debouncing should be provided. When LE is high, 5-bit data in the serial input register is transferred to the attenuator. When LE is high CLK is masked to prevent data transition during output loading. When P/S is low, 3-wire SPI interface inputs (DATA, CLK, LE) are disabled and serial input register is loaded asynchronously with parallel digital inputs (B0-B4). When Le is high, 5-bit parallel data is transferred to the attenuator. For all modes of operations, attenuation state will stay constant while LE is kept low. 12 T L - SM A IT IG - D Parameter Typ. S Min. serial period, t 100 ns SCK Timing Diagram (Latched Parallel Mode) R Control set-up time, t 20 ns CS Control hold-time, t 20 ns IE CH LE Set up-time, t 10 ns LN IF Min. LE pulse width, t 10 ns L LEW Min LE pulse spacing, t 530 ns P LES Serial clock hold-time from LE, t 10 ns CKN M Hold Time, t 0 ns PH A Latch Enable Minimum Width, t 10 ns LEN Setup Time, t 2 ns IN PS A Parallel Mode G (Direct Parallel Mode & Latched Parallel Mode) E Note: The parallel mode is enabled when P/S is set to low. L B Direct Parallel Mode - The attenuation state is changed by the Control Voltage Inputs directly. The LE (Latch Enable) IA must be at a logic high to control the attenuator in this manner. R Latched Parallel Mode - The attenuation state is selected using the Control Voltage Inputs and set while the LE is in A the Low state. The attenuator will not change state while LE is Low. Once all Control Voltage Inputs are at the desired V states the LE is pulsed. See timing diagram above for reference. Inf F or o m r pr ation ifc ur e, de nished lbiv y e Anry alo a g n D d to p evices is la beclie o eved rde to b r e sa: H ccur iattti e tae M nd reliicr abl ow e. H a o v wee C ver, o n rp o o F roar tiporin c ,e 2 , 0 de A liv lepha R ry, an o d t ad, C o plac h e eolm rdesrfo s: rd, MA 01 Analog Devi 8 c 2 e 4 s, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No rde Phon r O e: 7 n- 81 li 3 n 2 e a 9-4 t w 70 ww 0 • O . rdh e itt r o ite nli .c n o e a m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. t www.analog.com 12 - 41 Application Support: Phon Trademarks and registered trademarks are the property of their respective owners. e: 978-250-334 A 3 o pplic r app ation S s u @ p h por ittti : Pte ho.c n o e m : 1-800-ANALOG-D
