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Datasheet HVLED001B (STMicroelectronics) - 6

ПроизводительSTMicroelectronics
ОписаниеDS12748: High power factor flyback controller with constant voltage primary-sensing and ultra-low standby consumption
Страниц / Страница33 / 6 — Pin settings. HVLED001B. Figure 4. Pin connection. Table 2. Pin …
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Язык документаанглийский

Pin settings. HVLED001B. Figure 4. Pin connection. Table 2. Pin description. Symbol Pin. Description

Pin settings HVLED001B Figure 4 Pin connection Table 2 Pin description Symbol Pin Description

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Pin settings HVLED001B 3 Pin settings Figure 4. Pin connection
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Table 2. Pin description Symbol Pin Description
High voltage startup and input voltage detection. The pin, able to withstand 800 V, is to be tied to the input voltage using a low value resistor (1 k typ.). It embeds the internal start-up unit that charges the capacitor connected between the VCC pin HVSU 1 and GND pin during startup and low consumption. During operational mode, the voltage at this pin is used to both measure the input voltage and detect input over-voltages. N.C. 2 Not connected pin. A blanking time, starting from first valley detection, can be set applying a voltage to this pin. This TOFF 3 variable blanking time is used to skip resonant valleys and, then, to fold back the operating frequency. A null blanking time is obtained leaving the pin unconnected. Output of the error amplifier of primary side regulation loop regulation. The pin is intended to be connected to the compensation network for primary side regulation. FB 4 An upper threshold VOFP detects an overload. Burst mode is also related to the voltage applied to this pin. Input for optocoupler in secondary side control loop. This pin is intended to be connected to the collector of the optocoupler. OPTO 5 The OPTO pin voltage is internally applied to an OR structure together with FB voltage to feed the internal multiplier. Low consumption mode is invoked pulling this pin lower than the VOPTO,dis threshold that features as burst mode level when OPTO is in use. Multiple function pin able to detect the Zero Current instant, to sense the output voltage for the primary side regulation and the input voltage for brownout detection. A negative-going edge triggers ZCD 6 the MOSFET's turn-on, while an internal starter unit is active to generate the triggering signal when not externally available (e.g. startup). Input to the current sense comparator for the power regulation. CS 7 A second level overcurrent (OCP) threshold detects abnormal currents (e.g.: due to transformer's saturation) and, on this occurrence, activates the second level overcurrent protection procedure. GND 8 Reference pin. 6/33 DS12748 Rev 1 Document Outline Table 1. Device summary 1 Block diagram Figure 1. Block diagram 2 Typical application - HPF flyback Figure 2. Primary side regulated (PSR) application Figure 3. Secondary side regulated (SSR) application 3 Pin settings Figure 4. Pin connection Table 2. Pin description (continued) 4 Electrical data 4.1 Absolute maximum ratings Table 3. Absolute maximum ratings 4.2 Thermal data Table 4. Thermal data 4.3 Recommended operating conditions Table 5. Recommended operating conditions 5 Electrical characteristics Table 6. Electrical characteristics (continued) 6 Typical electrical characteristic 6.1 Parameter graphs Figure 5. ICC vs. Fsw @ VCC = 15V Figure 6. VCC,on and VCC,su vs. Tj Figure 7. Icharge and Icharge,su vs. Tj Figure 8. IFB,src and IFB,snk vs. Tj Figure 9. Vbm, Vbm2 and VOPTO,dis vs. Tj Figure 10. Tbm and Tbm2 vs. Tj Figure 11. VZCD,arm and VZCD,trig vs. Tj Figure 12. VCS,lim vs. Tj Figure 13. VREF,PSR vs. Tj Figure 14. IFB vs. VZCD sample Figure 15. TBLANK,min vs. Tj Figure 16. TBLANK,var vs. Tj 7 Application information 7.1 Operating modes Figure 17. High power factor flyback - Primary side regulated constant output voltage Figure 18. High power factor flyback – Secondary side regulated application 7.1.1 Start-up mode Figure 19. Initial start-up phase 7.1.2 Ramp-up mode 7.1.3 Active mode 7.1.4 Low consumption mode 7.1.5 Stop mode 7.2 Control loop Figure 20. Control loop blocks 7.2.1 Current sense input 7.2.2 Feedback input 7.2.3 Zero current detection Figure 21. TBLANK,var time vs. TOFF voltage Figure 22. TBLANK,var time vs. TOFF voltage 7.2.4 Primary side regulation feature Figure 23. PSR E/A small signal model 7.2.5 Burst mode operation 7.3 Gate driver 7.4 IC supply management 7.4.1 VCC supply management 7.4.2 High voltage startup Table 7. HVSU operating modes 7.5 Auto restart timer (ART) 7.6 Protections 7.6.1 Over current protection (OCP) 7.6.2 Input over voltage protection (I-OVP) 7.6.3 Brownout protection (BO) 7.6.4 Over power protection (OPP) 7.6.5 Output over voltage protection (oOVP) 7.7 Disable and monitor feature 8 Package information 8.1 SSOP10 package outline Figure 24. SSOP10 package mechanical data Table 8. SSOP10 package mechanical data 9 Revision history Table 9. Document history
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