Datasheet LTC3620 (Analog Devices) - 9

LTC3620
OPERATION
The LTC3620 is a variable frequency buck switching regu- switching frequency will be clamped is dependent on the lator with a maximum output current of 15mA. At high externally set frequency and the value of the inductor used. loads the LTC3620 will supply constant peak current pulses A higher externally set minimum frequency will result in through the output inductor at a frequency dependent on a higher load current threshold below which the part will the load current. lock to this minimum frequency. The relationship between load current and minimum frequency is described by the A switching cycle is initiated by a pulse from the error following equation: amplifi er, EAMP. The top FET is turned on and remains on until the peak current threshold is sensed by ICMP (35mA V ( IN) f(MIN) L ( )(35mA)2 at full loads). When this occurs, the top FET it is turned off IMAX(LOCK) = 2V ( ) and the bottom FET is turned on. The bottom FET remains OUT VIN – VOUT on until the inductor current drops to 0A, as sensed by the The LTC3620 will switch at this externally set frequency reverse-current comparator, RCMP. The time interval before at load currents below this threshold; though in general, another switching cycle is initiated is adjusted based on neither this minimum nor this synchronization will be the output voltage error, measured by the EAMP to be the maintained during load transients. difference between VFB and the 0.6V reference. At very light loads, the minimum PFET on time will be As the load current decreases, the EAMP will decrease reached and the peak inductor current can no longer the switching frequency to match the load, until the mini- be reduced. In this situation, the LTC3620 will resume mum switching frequency (internally or externally set) is decreasing the regulator switching frequency to prevent reached. With the FMIN/MODE pin pulled low, the minimum the output voltage from climbing uncontrollably. frequency is internally set to 50kHz. Further decreasing the load will cause the phase frequency detector (PFD) to For those applications which are not sensitive to the spectral decrease the peak inductor current in order to maintain content of the output ripple, the minimum frequency clamp the switching frequency at 50kHz. can be defeated by pulling the FMIN/MODE pin high. In this mode the inductor current peaks will be held at 35mA and The minimum switching frequency can be externally set the switching frequency will decrease without limit. by clocking the FMIN/MODE pin at the desired minimum switching frequency. The load current below which the 1000 200kHz, EXTERNAL FMIN/MODE = 0V FMIN/MODE = VIN 100 SWITCHING FREQUENCY (kHz) TA = 25°C VIN = 3.6V VOUT = 1.1V 10 0.01 0.1 1 10 20 LOAD CURRENT (mA) 3620 F01
Figure 1. Switching Frequency vs Load Current, FMIN/MODE
3620fa 9 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATIONS RELATED PARTS