Datasheet LT1194 (Analog Devices) - 4

LT1194
ELECTRICAL CHARACTERISTICS The
●
denotes specifications which apply over the full operating temperature range of 0
°
C
≤
TA
≤
70
°
C. VS =
±
5V, VREF = 0V, Null Pins 1 and 8 open circuit, unless otherwise noted. LT1194C SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage All Packages ● 1 7 mV ∆VOS/∆T Input VOS Drift ● 6 µV/°C IOS Input Offset Current ● 0.2 3.5 µA IB Input Bias Current ● ±0.5 ±4 µA Input Voltage Range ● – 2.5 3.5 V CMRR Common Mode Rejection Ratio VCM = – 2.5V to 3.5V ● 60 80 dB PSRR Power Supply Rejection Ratio VS = ±2.375V to ±5V ● 60 80 dB VLIM Output Voltage Limit VI = ±0.5V, VC = 2V (Note 4) ● ±20 ±130 mV VOUT Output Voltage Swing VS = ±8V, RL = 1k ● 6.2 6.9 V V = 4V REF RL = 100Ω ● 6.1 6.7 V VS = ±8V, RL = 1k ● – 6.4 – 7.2 V V = – 4V REF RL = 100Ω ● – 6.2 – 6.6 V GE Gain Error VO = ±3V, RL = 1k ● 1 4 % IS Supply Current ● 35 43 mA
Note 1:
Absolute Maximum Ratings are those values beyond which the
Note 5:
Slew rate is measured between ±1V on the output, with a ±0.3V life of a device may be impaired. input step.
Note 2:
A heat sink is required to keep the junction temperature below
Note 6:
Full-power bandwidth is calculated from the slew rate absolute maximum when the output is shorted. measurement:
Note 3:
There are two limitations on signal swing. Output swing is limited FPBW = SR/2πVP. by clipping or saturation in the output stage. Input swing is controlled by
Note 7:
Settling time measurement techniques are shown in “Take the an adjustable input limiting function. On VS = ±5V, the overload Guesswork Out of Settling Time Measurements,” EDN, September 19, characteristic is output limiting, but on ±8V the overload characteristic is 1985. input limiting. VOMAX is measured with the null pins open circuit.
Note 8:
NTSC (3.58MHz).
Note 4:
Output amplitude is reduced by the input limiting function. The
Note 9:
AC parameters are 100% tested on the ceramic and plastic DIP input limiting function occurs when the null pins, 1 and 8, are tied together packaged parts (J and N suffix) and are sample tested on every lot of the and raised to a potential 0.3V or more above the negative supply. SO packaged part (S suffix).
Optional Offset Nulling Circuit Input Limiting Connection Input Limiting with Offset Nulling
5V 5V 5V 3 + 7 3 + 7 3 + 7 6 6 6 LT1194 LT1194 LT1194 2 – 4 2 – 4 2 – 4 8 8 8 –5V –5V –5V 1 1 V 1 C LT1194 • TA03 VC INPUT OFFSET VOLTAGE CAN BE ADJUSTED OVER A 250mV ± (NOTE 4) (NOTE 4) RANGE WITH A 1kΩ TO 10kΩ POTENTIOMETER 4