Datasheet LTC1759 (Analog Devices) - 8

LTC1759
U U U PIN FUNCTIONS VC (Pin 27):
This is the control signal of the inner loop of
Internal Power Supply Pins
the current mode PWM. Switching starts at 0.9V. Higher
AGND (Pin 6):
DC Accurate Ground for Analog Circuitry. VC corresponds to higher charging current in normal operation. A capacitor of at least 0.33µF to AGND filters out
VDD (Pin 16):
Low Voltage Power Supply Input. Bypass noise and controls the rate of soft start. this pin with 0.1µF.
PROG (Pin 28):
This pin is for programming the charging
DGND (Pin 18):
Ground for Digital Circuitry and DACs. current and for system loop compensation. During normal Should be connected to AGND at the negative terminal operation, the pin voltage is approximately 2.465V. of the charger output filter capacitor.
SENSE (Pin 29):
Current Amplifier CA1 Input. Sensing
VCC (Pin 32):
Power Input for Battery Charger Section. must be at the positive terminal of the battery. Bypass this pin with 0.47µF.
SPIN (Pin 30):
This pin is for the internal amplifier
GBIAS (Pin 34):
8.6V Regulator Output for Bootstrapping CA1 bias. It must be connected to R V SENSE as shown in BOOST and VBOOSTC. A bypass capacitor of at least 2µF is Figure 1. needed. Switching will stop if VBOOST drops below 7.1V.
BAT1 (Pin 31):
Current Amplifier CA1 Input.
PGND (Pin 36):
High Current Ground Return for Charger Gate Drivers.
BOOSTC (Pin 33):
This pin is used to bootstrap and supply the current sense amplifier CA1 for very low dropout
SBS Interface Pins
conditions. VCC can be as low as only 0.4V above the
INTB (Interrupt Bar) (Pin 13):
Active Low Interrupt Output battery voltage. A diode and a capacitor are needed to get to Host. Signals host that there has been a change of status the voltage from VBOOST. If low dropout is not needed and in the charger registers and that the host should read the VCC is always 3V or greater than VBAT, this pin can be left LTC1759 status registers to determine if any action on its floating or tied to VCC. Do not force this pin to a voltage part is required. This signal can be connected to the lower than VCC. optional SMBALERT# line of the SMBus. Open drain with
BGATE (Pin 35):
Drives the gate of the bottom external weak current source pull-up to VDD (with Schottky to allow N-channel FET of the charger buck converter. it to be pulled to 5V externally, see Figure 2).
Monitor/Fault Diagnostic Pins SDA (Pin 14):
SMBus Data Signal from Main (Host- controlled) SMBus.
DCDIV (Pin 21):
Supply Divider Input. This is a high impedance comparator input with a 1V threshold (rising
SCL (Pin 15):
SMBus Clock Signal from Main (Host- edge) and hysteresis. Controlled) SMBus. External pull-up resistor is required.
DCIN (Pin 22):
Input connected to the DC input source to
THERM (Pin 19):
Thermistor Force/Sense Pin to Smart monitor the DC input for power-fail condition. Battery. See Electrical Characteristics table for more detail. Maximum allowed combined capacitance on THERM
BAT2 (Pin 23):
Sensing Point for Voltage Control Loop. and RNR is 75pF. Connect this to the positive terminal of the battery.
RNR (Pin 20):
Thermistor Force/Sense Pin to Smart Battery. See Electrical Characteristics table for more detail. Maximum allowed combined capacitance on THERM and RNR is 75pF. 8