Datasheet LTM4613 (Analog Devices) - 7

LTM4613
PIN FUNCTIONS (See Package Description for Pin Assignments) VIN (Bank 1):
Power Input Pins. Apply input voltage be-
FCB (Pin M12):
Forced Continuous Input. Connect this pin tween these pins and PGND pins. Recommend placing to SGND to force continuous synchronization operation input decoupling capacitance directly between VIN pins at light load or to INTVCC to enable discontinuous mode and PGND pins. operation at light load.
PGND (Bank 2):
Power Ground Pins for Both Input and
TRACK/SS (Pin A9):
Output Voltage Tracking and Soft-Start Output Returns. Pin. When the module is configured as a master output,
V
then a soft-start capacitor is placed on this pin to ground
OUT (Bank 3):
Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing to control the master ramp rate. A soft-start capacitor can output decoupling capacitance directly between these pins be used for soft-start turn-on as a standalone regulator. and PGND pins (see the LTM4613 Pin Configuration below). Slave operation is performed by putting a resistor divider from the master output to the ground, and connecting the
VD (Pins C1 to C7, B6 to B7, A6):
Top FET Drain Pins. center point of the divider to this pin. See the Applications Add more high frequency ceramic decoupling capacitors Information section. between VD and PGND to handle the input RMS current and reduce the input ripple further.
MPGM (Pins A12, B11):
Programmable Margining In- put. A resistor from these pins to ground sets a current
DRVCC (Pins C10, E11, E12):
These pins normally connect that is equal to 1.18V/R. This current multiplied by 10k to INTVCC for powering the internal MOSFET drivers. They will equal a value in millivolts that is a percentage of the can be biased up to 6V from an external supply with about 0.6V reference voltage. Leave floating if margining is not 50mA capability. This improves efficiency at the higher used. See the Applications Information section. To parallel input voltages by reducing power dissipation in the module. LTM4613s, each requires an individual MPGM resistor. See the Applications Information section. Do not tie MPGM pins together.
INTVCC (Pin A7):
This pin is for additional decoupling of
f
the 5V internal regulator.
SET (Pin B12):
Frequency Set Internally to 600kHz at 12V Output. An external resistor can be placed from this pin
PLLIN (Pin A8):
External Clock Synchronization Input to the to ground to increase frequency or from this pin to VIN Phase Detector. This pin is internally terminated to SGND to reduce frequency. See the Applications Information with a 50k resistor. Apply a clock above 2V and below section for frequency adjustment. INTVCC subject to minimum on-time and minimum off-time requirements. See the Applications Information section. TOP VIEW V CC V D INT PLLIN TRACK/SS RUN COMP MPGM V A IN BANK 1 B V fSET D C MARG0 SGND D MARG1 E DRVCC PGND F VFB BANK 2 G PGOOD H SGND J NC VOUT K NC BANK 3 L NC M FCB 1 2 3 4 5 6 7 8 9 10 11 12 LGA PACKAGE 133-LEAD (15mm × 15mm × 4.32mm)
LTM4613 Pin Configuration
4613fd For more information www.linear.com/LTM4613 7 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Package Photograph Related Parts