link to page 8 AD588Data Sheet Figure 5 shows gain and balance trims in a +5 V and −5 V 39kΩ+15V tracking configuration. A 100 kΩ, 20-turn potentiometer NOISE1µFREDUCTION is used for each trim. The potentiometer for gain trim is connected between Pin 6 (VHIGH) and Pin 8 (VLOW) with the wiper connected to Pin 5 (GAIN ADJ). The potentiometer is A3+5VRB adjusted to produce exactly 10 V between Pin 1 and Pin 15, the A1 amplifier outputs. The balance potentiometer, also connected AD588R4 between Pin 6 and Pin 8 with the wiper to Pin 12 (BAL ADJ), is R1 then adjusted to center the span from +5 V to −5 V. R2A4–5VR5 Trimming in other configurations works in exactly the same +VS+15V manner. When producing +10 V and +5 V, GAIN ADJ is used R3R60.1µF to trim +10 V and BAL ADJ is used to trim +5 V. In the −10 V A2SYSTEM–VGROUNDS and −5 V configuration, GAIN ADJ is again used to trim the 0.1µF–15V magnitude of the span, −10 V, while BAL ADJ is used to trim the center tap, −5 V. SYSTEMGROUND Trimming the AD588 introduces no additional errors over 100kΩ20T temperature, so precision potentiometers are not required. For BALANCE single-output voltage ranges, or in cases when balance adjust is ADJUST not required, Pin 12 should be connected to Pin 11. If gain 100kΩ 005 20T 1- adjust is not required, Pin 5 should be left floating. GAIN ADJUST 0053 Figure 5. +5 V and −5 V Outputs In single output configurations, GAIN ADJ is used to trim outputs utilizing the full span (+10 V or −10 V), while BAL ADJ is used to trim outputs using half the span (+5 V or −5 V). 0.1µF Input impedance on both the GAIN ADJ and BAL ADJ pins is NOISE approximately 150 kΩ. The GAIN ADJ trim network effectively 0.1µFREDUCTION7643 attenuates the 10 V across the trim potentiometer by a factor of about 1500 to provide a trim range of −3.5 mV to +7.5 mV with A31–5V a resolution of approximately 550 μV/turn (20-turn potentiome- RB ter). The BAL ADJ trim network attenuates the trim voltage by A1AD588 a factor of about 1400, providing a trim range of ±4.5 mV with 14R1R4 resolution of 450 μV/turn. R2A415–10VR57643+VS 2+15VR3R60.1µFA31+10VSYSTEMA2RB–VS 16GROUND0.1µFA159108121113–15V14R1R4SYSTEMGROUND 006 R2A415+5VR5 00531- +VS 2+15V Figure 6. −10 V Output R6R3AD5880.1µFSYSTEMA2–VGROUNDS 160.1µF59108121113–15V 004 SYSTEM 31- GROUND 005 Figure 4. +10 V Output Rev. M | Page 8 of 20 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS THEORY OF OPERATION APPLICATIONS INFORMATION CALIBRATION NOISE PERFORMANCE AND REDUCTION TURN-ON TIME TEMPERATURE PERFORMANCE KELVIN CONNECTIONS DYNAMIC PERFORMANCE USING THE AD588 WITH CONVERTERS AD7535 14-BIT DIGITAL-TO-ANALOG CONVERTER AD569 16-BIT DIGITAL-TO-ANALOG CONVERTER SUBSTITUTING FOR INTERNAL REFERENCES AD574A 12-BIT ANALOG-TO-DIGITAL CONVERTER RESISTANCE TEMPERATURE DETECTOR (RTD) EXCITATION BOOSTED PRECISION CURRENT SOURCE BRIDGE DRIVER CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE