Datasheet LTC4307-1 (Analog Devices) - 9

LTC4307-1
OPERATION
capacitance from 50pF to 150pF results in a tPHL increase
ENABLE
from 81ns to 91ns. Larger output capacitances translate When the ENABLE pin is driven below 0.8V with respect to to longer delays (up to 125ns). Users must quantify the the LTC4307-1’s ground, the input 2-wire bus is discon- difference in propagation times for a rising edge versus nected from the output 2-wire bus and the READY pin is a falling edge in their systems and adjust setup and hold internally pulled low. When the pin is driven above 2V, times accordingly. the part waits for data transactions on both 2-wire bus- ses to be complete (as described in the Start-Up section)
READY Digital Output
before connecting the two sides. At this time the internal This pin provides a digital fl ag which is low when either pull-down on READY releases. ENABLE is low or the start-up sequence described earlier in this section has not been completed. READY goes high
LTC4307 and LTC4307-1 Feature Differences
when ENABLE is high and the input and output 2-wire The LTC4307-1 HDMI level-shifting 2-wire bus buffer is busses are connected. The pin is driven by an open-drain specifi cally intended for HDMI applications. Features in pull-down capable of sinking 3mA while holding 0.4V on the general purpose LTC4307 device that are not required the pin. Connect a resistor to VCC to provide the pull-up. in HDMI systems have been removed. In addition, level- READY can be used to control the HDMI hot plug detect shifting functionality has been added to the LTC4307-1 (HPD) signal to prevent the possibility of erroneous at- to allow 3.3V HDMI devices to interface safely to the 5V tempts by the source to contact the sink before the sink HDMI DDC bus. See Table 1 for a list of the differences is ready to communicate. between the LTC4307 and LTC4307 -1.
Table 1. Differences Between the LTC4307 and the LTC4307-1 SPECIFICATION LTC4307 LTC4307-1 COMMENTS ON LTC4307-1
Pre-charge Yes No HDMI DDC Lines are Not Hot Swapped Yes, Provides Communication Between 3.3V and 5V DDC Busses, Level Shifting No 2.2V to 5.5V Protects 3.3V Devices from 5V Supply Stuck Bus Disconnect and Recovery Yes No Stuck Busses, Not an Issue in HDMI Systems Rise Time Accelerators Yes No Complies with HDMI Specifi cation Version 1.3 DDC Capacitance Requirement
APPLICATIONS INFORMATION
Figure 3 shows the LTC4307-1 in a capacitance buffering In HDMI, the sink device pulls the hot plug detect HPD application. Due to the LTC4307-1’s capacitance buffering signal high to tell the source that it is ready to accept feature and sub-10pF input capacitance, this application commands through the DDC. This signal can be controlled circuit passes the HDMI 50pF maximum DDC capacitance through the READY pin of the LTC4307-1 to prevent the specifi cation easily when the LTC4307-1 is located right at possibility of erroneous attempts by the source to contact the HDMI connector interface as shown. The capacitance the sink before the sink is ready to return its extended of the internal bus connected to the SDAIN and SCLIN display identifi cation data (EDID). The READY pin only pins may be much larger than 50pF, but because of the goes high after 5V is applied and the LTC4307-1 ENABLE LTC4307-1’s capacitance buffering, the internal bus ca- pin is pulled high by the HDMI receiver IC, a controller in pacitance is isolated from the HDMI connector. the sink, or the 5V line itself. 43071fa 9