Datasheet AD8421 (Analog Devices) - 6

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Data Sheet AD8421 AR Grade BR Grade Test Conditions/ Parameter Comments Min Typ Max Min Typ Max Unit
POWER SUPPLY Operating Range Dual supply ±2.5 ±18 ±2.5 ±18 V Single supply 5 36 5 36 V Quiescent Current 2 2.3 2 2.3 mA Over Temperature TA = −40°C to +85°C 2.6 2.6 mA TEMPERATURE RANGE For Specified Performance −40 +85 −40 +85 °C Operational5 −40 +125 −40 +125 °C 1 Total voltage noise = √(e 2 2 ni + (eno/G)2 + eRG ). See the Theory of Operati s on ection for more information. 2 Total RTI VOS = (VOSI) + (VOSO/G). 3 These specifications do not include the tolerance of the external gain setting resistor, RG. For G > 1, add RG errors to the specifications given in this table. 4 Input voltage range of the AD8421 input stage only. The input range can depend on the common-mode voltage, differential voltage, gain, and reference voltage. See the Input Voltage Range section for more details. 5 See the Typical Performance Characteristics section for expected operation between 85°C and 125°C.
ARM AND BRM GRADES Table 2. ARM Grade BRM Grade Test Conditions/ Parameter Comments Min Typ Max Min Typ Max Unit
COMMON-MODE REJECTION RATIO (CMRR) CMRR DC to 60 Hz with 1 kΩ VCM = −10 V to +10 V Source Imbalance G = 1 84 92 dB G = 10 104 112 dB G = 100 124 132 dB G = 1000 134 140 dB Over Temperature, G = 1 TA = −40°C to +85°C 80 90 dB CMRR at 20 kHz VCM = −10 V to +10 V G = 1 80 80 dB G = 10 90 90 dB G = 100 100 100 dB G = 1000 100 100 dB NOISE Voltage Noise, 1 kHz1 VIN+, VIN− = 0 V Input Voltage Noise, eni 3 3.2 3 3.2 nV/√Hz Output Voltage Noise, eno 60 60 nV/√Hz Peak to Peak, RTI f = 0.1 Hz to 10 Hz G = 1 2 2 2.2 μV p-p G = 10 0.5 0.5 μV p-p G = 100 to 1000 0.07 0.07 0.09 μV p-p Current Noise Spectral Density f = 1 kHz 200 200 fA/√Hz Peak to Peak, RTI f = 0.1 Hz to 10 Hz 18 18 pA p-p VOLTAGE OFFSET2 Input Offset Voltage, VOSI VS = ±5 V to ±15 V 70 50 μV Over Temperature TA = −40°C to +85°C 135 135 μV Average TC 0.9 0.9 μV/°C Output Offset Voltage, VOSO 600 400 μV Over Temperature TA = −40°C to +85°C 1 1 mV Average TC 9 9 μV/°C Rev. 0 | Page 5 of 28 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AR AND BR GRADES ARM AND BRM GRADES ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION RG Power Dissipation REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT VOLTAGES BEYOND THE SUPPLY RAILS Input Voltages Beyond the Maximum Ratings RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT CONFIGURATION DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE