link to page 8 link to page 7 link to page 7 link to page 7 Data SheetADL5567Test Conditions/VS = 3.3 VVS = 5 VParameterCommentsMinTypMaxMinTypMaxUnit 1000 MHz2 HD2 −59 −70 dBc HD3 −49 −55 dBc OIP3 29 32 dBm IMD3 −62 −68 dBc OIP2 62.1 65.4 dBm IMD2 −64 −67 dBc NF 8.1 8.2 dB NSD, RTI 1.48 1.50 nV/√Hz 1500 MHz2 HD2 −44 −50 dBc HD3 −47 −51 dBc OIP3 21.3 25.3 dBm IMD3 −47 −55 dBc OIP2 50.2 51.8 dBm IMD2 −52 −54 dBc NF 8.3 8.4 dB NSD, RTI 1.52 1.54 nV/√Hz 2000 MHz2 HD2 −49 −50 dBc HD3 −44 −44 dBc OIP3 17.5 19 dBm IMD3 −39 −42 dBc OIP2 43.3 51.4 dBm IMD2 −45 −53 dBc NF 9.6 9.7 dB NSD, RTI 1.8 1.83 nV/√Hz 1 NSD RTI is calculated from NF, as follows: NSD (RTI) = ½ × NF 4kT ×10 /10 − 1× R IN where: k is Boltzmann's constant, which equals 1.381 × 10−23J/K. T is the standard absoltute temperature for evaluating noise figure, which equals 290 K. RIN is the differential input impedance of each amplifier, which equals 100 Ω. 2 OP1dB is not specified above 500 MHz, as the output level exceeds absolute maximum level allowed (see Table 2). Rev. 0 | Page 5 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS INPUT AND OUTPUT INTERFACING Single-Ended Input to Differential Output INPUT AND OUTPUT EQUIVALENT CIRCUITS GAIN ADJUSTMENT AND INTERFACING EFFECT OF LOAD CAPACITANCE ADC INTERFACING SOLDERING INFORMATION AND RECOMMENDED LAND PATTERN EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
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