Datasheet AD10242 (Analog Devices) - 4

AD10242 Test Mil AD10242BZ/TZ Parameter Temp Level Subgroup Min Typ Max Unit
SPURIOUS-FREE DYNAMIC RANGE9 Analog Input @ 1.2 MHz 25°C I 81 dBFS @ 4.85 MHz 25°C I 4 70 80 dBFS Full II 5, 6 70 79 dBFS @ 9.9 MHz 25°C I 4 63 70 dBFS Full II 5, 6 63 69 dBFS @ 19.5 MHz 25°C I 4 60 67 dBFS Full II 5, 6 60 66 dBFS TWO-TONE IMD REJECTION10 F1, F2 @ –7 dBFS Full II 4, 5, 6 70 76 dBc CHANNEL-TO-CHANNEL ISOLATION11 25°C IV 12 75 80 dB TRANSIENT RESPONSE 25°C V 10 ns LINEARITY Differential Nonlinearity 25°C IV 12 0.3 1.0 LSB (Encode = 20 MHz) Full IV 12 0.5 1.25 LSB Integral Nonlinearity 25°C V 0.3 LSB (Encode = 20 MHz) Full V 0.5 LSB OVERVOLTAGE RECOVERY TIME12 VIN = 2.0 × FS Full IV 12 50 100 ns VIN = 4.0 × FS Full IV 12 75 200 ns DIGITAL OUTPUTS Logic Compatibility CMOS Logic “1” Voltage13 Full I 1, 2, 3 3.5 4.2 V Logic “0” Voltage14 Full I 1, 2, 3 0.45 0.65 V Output Coding Twos Complement POWER SUPPLY AVCC Supply Voltage Full VI 5.0 V I (AVCC) Current Full V 260 mA AVEE Supply Voltage Full VI –5.0 V I (AVEE) Current Full V 55 mA DVCC Supply Voltage Full VI 5.0 V I (DVCC) Current Full V 25 mA ICC (Total) Supply Current Full I 1, 2, 3 350 400 mA Power Dissipation (Total) Full I 1, 2, 3 1.75 2.0 W Power Supply Rejection Ratio (PSRR) Full I 7, 8 0.01 0.02 % FSR/% VS Pass-Band Ripple to 10 MHz Full IV 12 0.2 dB NOTES 1Gain tests are performed on AIN3 over specified input voltage range. 2Input capacitance specifications combine AD9632 die capacitance and ceramic package capacitance. 3Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB. 4ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 µF capacitor. 5ENCODE may also be driven differentially in conjunction with ENCODE; see Encoding the AD10242 section for details. 6Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%. 7Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 40.0 MSPS. 8Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 40.0 MSPS. 9Analog Input signal equals –1 dBFS; SFDR is the ratio of converter full scale to worst spur. 10Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. f1 = 10.0 MHz ± 100 kHz, 50 kHz ≤ f1 – f2 ≤ 300 kHz. 11Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel (A IN1). 12Input driven to 2× and 4× AIN1 range for >4 clock cycles. Output recovers in band in specified time with Encode = 40 MSPS. No foldover guaranteed. 13Outputs are sourcing 10 µA. 14Outputs are sinking 10 µA. All specifications guaranteed within 100 ms of initial power-up regardless of sequencing. Specifications subject to change without notice. REV. D –3– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS1 EXPLANATION OF TEST LEVELS PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS Analog Bandwidth Aperture Delay Aperture Uncertainty (Jitter) Differential Nonlinearity Encode Pulsewidth/Duty Cycle Harmonic Distortion Integral Nonlinearity Minimum Conversion Rate Maximum Conversion Rate Output Propagation Delay Overvoltage Recovery Time Power Supply Rejection Ratio Signal-to-Noise and Distortion (SINAD) Signal-to-Noise Ratio (SNR, without Harmonics) Spurious-Free Dynamic Range (SFDR) Transient Response Two-Tone Intermodulation Distortion Rejection Two-Tone SFDR EQUIVALENT CIRCUITS Typical Performance Characteristics THEORY OF OPERATION APPLYING THE AD10242 Encoding the AD10242 Performance Improvements USING THE FLEXIBLE INPUT GROUNDING AND DECOUPLING Analog and Digital Grounding LAYOUT INFORMATION EVALUATION BOARD OUTLINE DIMENSIONS Ordering Guide Revision History