Datasheet AD7660 (Analog Devices) - 10

AD7660 100 16.0 92 50 95 15.5 40 OVDD @ 2.7V, 85 C SNR 90 15.0 90 S/(N+D) 30 Y – ns OVDD @ 2.7V, 25 C 85 ENOB 14.5 O FULL SCALE) – dB T DELA 20 ENOB – Bits t 12 80 14.0 88 OVDD @ 5V, 85 C SNR AND S/(N+D) – dB 10 75 13.5 OVDD @ 5V, 25 C SNR (REFERRED 13.0 70 86 0 1 10 100 1k –50 –40 –30 –20 –10 0 0 50 100 150 200 FREQUENCY – Hz C INPUT LEVEL – dB L – pF
TPC 10. SNR, S/(N+D), and ENOB TPC 11. SNR vs. Input Level TPC 12. Typical Delay vs. Load vs. Frequency Capacitance C (Referred to Full Scale) L
10M 100 12 AVDD 90 10 1M 80 8 DVDD FULL SCALE ERROR 6 100k 70 4 60 10k 2 50 TING CURRENTS – nA DVDD 0 OVDD 40 ZERO ERROR 1k –2 30 TING CURRENTS – nA –4 100 WN OPERA 20 AVDD –6 OPERA 10 10 –8 0 OVDD –10 WER-DO 1 ZERO ERROR, FULL SCALE ERROR (LSB) PO –10 –12 0.1 1 10 100 1k 10k 100k 1M –40 –15 10 35 60 85 110 –55 –35 –15 5 25 45 65 85 105 125 SAMPLING RATE – SPS TEMPERATURE ( TEMPERATURE – C) C
TPC 13. Operating Currents TPC 14. Power-Down Operating TPC 15. Zero Error, Full Scale vs. vs. Sample Rate Currents vs. Temperature Temperature REV. E –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal-to-(Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Overvoltage Recovery Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VS. THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS Bipolar and Wider Input Ranges Layout Evaluating the AD7660 Performance OUTLINE DIMENSIONS Revision History