Datasheet AD7677 (Analog Devices) - 9

AD7677 PIN CONFIGURATION 48-Lead LQFP (ST-48) NC NC NC NC NC IN+ NC NC NC IN– REFGND REF 48 47 46 45 44 43 42 41 40 39 38 37 AGND 1 36 AGND PIN 1 AVDD 2 IDENTIFIER 35 CNVST NC 3 34 PD BYTESWAP 4 33 RESET 5 OB/2C 32 CS WARP 6 AD7677 31 RD TOP VIEW IMPULSE 7 30 (Not to Scale) DGND 8 SER/PAR 29 BUSY D0 9 28 D15 D1 10 27 D14 11 D2/DIVSCLK[0] 26 D13 D3/DIVSCLK[1] 12 25 D12 13 14 15 16 17 18 19 20 21 22 23 24 NC = NO CONNECT D D INT D D OR OGND OV DV DGND D9/SCLK D10/SYNC D4/EXT/ D8/SDOUT D5/INVSYNC D6/INVSCLK D7/RDC/SDIN D11/RDERR DEFINITION OF SPECIFICATIONS EFFECTIVE NUMBER OF BITS (ENOB) INTEGRAL NONLINEARITY ERROR (INL)
ENOB is a measurement of the resolution with a sine wave Linearity error refers to the deviation of each individual code from input. It is related to S/(N+D) by the following formula: a best-fit line drawn from “negative full scale” through “positive full scale.” The point used as “negative full scale” occurs 1/2 LSB ENOB = S / N ( [ + D] – .17 )6/ .602 dB before the first code transition. “Positive full scale” is defined as a and is expressed in bits. level 1 1/2 LSB beyond the last code transition.
TOTAL HARMONIC DISTORTION (THD) DIFFERENTIAL NONLINEARITY ERROR (DNL)
THD is the ratio of the rms sum of the first five harmonic In an ideal ADC, code transitions are 1 LSB apart. Differential components to the rms value of a full-scale input signal and is nonlinearity is the maximum deviation from this ideal value. It expressed in decibels. is often specified in terms of resolution for which no missing codes are guaranteed.
SIGNAL-TO-NOISE RATIO (SNR)
SNR is the ratio of the rms value of the actual input signal to
+FULL-SCALE ERROR
the rms sum of all other spectral components below the Nyquist The last transition (from 011 . 10 to 011 . 11 in two’s frequency, excluding harmonics and dc. The value for SNR is complement coding) should occur for an analog voltage 1 1/2 LSB expressed in decibels. below the nominal +full scale (2.499886 V for the ±2.5 V range). The +full-scale error is the deviation of the actual level of the
SIGNAL-TO-(NOISE + DISTORTION) RATIO (S/[N+D])
last transition from the ideal level. S/(N+D) is the ratio of the rms value of the actual input signal to the rms sum of all other spectral components below the
–FULL-SCALE ERROR
Nyquist frequency, including harmonics but excluding dc. The The first transition (from 100 . 00 to 100 . 01 in two’s value for S/(N+D) is expressed in decibels. complement coding) should occur for an analog voltage 1/2 LSB above the nominal –full scale (–2.499962 V for the ±2.5 V range).
APERTURE DELAY
The –full-scale error is the deviation of the actual level of the Aperture delay is a measure of the acquisition performance and first transition from the ideal level. is measured from the falling edge of the CNVST input to when the input signal is held for a conversion.
ZERO ERROR
The zero error is the difference between the ideal midscale input
TRANSIENT RESPONSE
voltage (0 V) and the actual voltage producing the midscale The time required for the AD7677 to achieve its rated accuracy output code. after a full-scale step function is applied to its input.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
The difference, in decibels (dB), between the rms amplitude of the input signal and the peak spurious signal. –8– REV. A Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PulSAR Selection GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS Table I. Serial Clock Timings in Master Read after Convert ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Single to Differential Driver Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7677 Performance OUTLINE DIMENSIONS Revision History