Datasheet AD7734 (Analog Devices) - 8

Data Sheet AD7734 Timing Diagrams CS t4 t5 t8 SCLK t t 5 5 t t 5A 9
002
DOUT MSB LSB
03071- Figure 2. Read Cycle Timing Diagram
CS t11 t t 14 15 SCLK t15 t12 t13
003
DIN MSB LSB
03071- Figure 3. Write Cycle Timing Diagram
ISINK (800
µ
A AT DVDD = + 5V 100
µ
A AT DVDD = + 3V) TO OUTPUT 1.6V PIN 50pF I
004
SOURCE (200
µ
A AT DVDD = + 5V 100
µ
A AT DVDD = + 3V)
03071- Figure 4. Load Circuit for Access Time and Bus Relinquish Time Rev. B | Page 7 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION SPECIFICATION CHOPPING ENABLED CHOPPING DISABLED PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REGISTER DESCRIPTION REGISTER ACCESS COMMUNICATIONS REGISTER I/O PORT REGISTER REVISION REGISTER TEST REGISTER ADC STATUS REGISTER CHECKSUM REGISTER ADC ZERO-SCALE CALIBRATION REGISTER ADC FULL-SCALE REGISTER CHANNEL DATA REGISTERS CHANNEL ZERO-SCALE CALIBRATION REGISTERS CHANNEL FULL-SCALE CALIBRATION REGISTERS CHANNEL STATUS REGISTERS CHANNEL SETUP REGISTERS CHANNEL CONVERSION TIME REGISTERS MODE REGISTER DIGITAL INTERFACE DESCRIPTION HARDWARE RESET ACCESS THE AD7734 REGISTERS SINGLE CONVERSION AND READING DATA DUMP MODE CONTINUOUS CONVERSION MODE CONTINUOUS READ (CONTINUOUS CONVERSION) MODE CIRCUIT DESCRIPTION ANALOG FRONT END ANALOG INPUT’S EXTENDED VOLTAGE RANGE CHOPPING MULTIPLEXER, CONVERSION, AND DATA OUTPUT TIMING Σ-Δ ADC FREQUENCY RESPONSE VOLTAGE REFERENCE INPUTS REFERENCE DETECT I/O PORT CALIBRATION ADC ZERO-SCALE SELF-CALIBRATION PER CHANNEL SYSTEM CALIBRATION OUTLINE DIMENSIONS ORDERING GUIDE