Datasheet AD7951 (Analog Devices) - 3

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AD7951 Data Sheet TABLE OF CONTENTS
Features .. 1 Analog Inputs.. 20 Applications ... 1 Voltage Reference Input/Output .. 21 General Description ... 1 Power Supplies .. 22 Functional Block Diagram .. 1 Conversion Control ... 23 Revision History ... 2 Interfaces.. 24 Specifications ... 3 Digital Interface .. 24 Timing Specifications .. 5 Parallel Interface ... 24 Absolute Maximum Ratings .. 7 Serial Interface .. 25 ESD Caution .. 7 Master Serial Interface ... 25 Pin Configuration and Function Descriptions ... 8 Slave Serial Interface .. 27 Typical Performance Characteristics ... 12 Hardware Configuration ... 29 Terminology .. 16 Software Configuration ... 29 Theory of Operation .. 17 Microprocessor Interfacing ... 30 Overview .. 17 Application Information .. 31 Converter Operation .. 17 Layout Guidelines... 31 Modes of Operation ... 18 Outline Dimensions ... 32 Transfer Functions.. 18 Ordering Guide .. 32 Typical Connection Diagram.. 19
REVISION HISTORY 5/15—Rev. A to Rev. B
Change to Acquisition Time Parameter, Table 3 .. 5 Deleted Evaluating Performance Section .. 31 Changes to Ordering Guide .. 32
12/12—Rev. 0 to Rev. A
Added Exposed Pad Note .. 8 Changes to Power Sequencing Section .. 23 Updated Outline Dimensions ... 32 Changes to Ordering Guide .. 32
10/06—Revision 0: Initial Version
Rev. B | Page 2 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION MODES OF OPERATION Normal Mode Impulse Mode TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V) (PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V) (PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (SER/PAR = High, EXT/INT = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (SER/PAR = High, EXT/INT = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE