AD9230-11* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017COMPARABLE PARTSDESIGN RESOURCES View a parametric search of comparable parts. • AD9230-11 Material Declaration • PCN-PDN Information EVALUATION KITS • Quality And Reliability • AD9230-11 Evaluation Board • Symbols and Footprints DOCUMENTATIONDISCUSSIONSApplication Notes View all AD9230-11 EngineerZone Discussions. • AN-1142: Techniques for High Speed ADC PCB Layout Data SheetSAMPLE AND BUY • AD9230-11: 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Visit the product page to see pricing options. Converter Data Sheet TECHNICAL SUPPORTREFERENCE MATERIALS Submit a technical question or find your regional support Technical Articles number. • Improve The Design Of Your Passive Wideband ADC Front-End Network DOCUMENT FEEDBACK • MS-2210: Designing Power Supplies for High Speed ADC Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT AND VOLTAGE REFERENCE Differential Input Configurations CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations POWER DISSIPATION AND POWER-DOWN MODE DIGITAL OUTPUTS Digital Outputs and Timing Output Data Rate and Pinout Configuration Out-of-Range (OR) TIMING RBIAS CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP TABLE RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS TRANSFER REGISTER MAP OUTLINE DIMENSIONS ORDERING GUIDE
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