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Datasheet AD7175-2 (Analog Devices) - 3

ПроизводительAnalog Devices
Описание24-Bit, 250 kSPS, Sigma-Delta ADC with 20 µs Settling and True Rail-to-Rail Buffers
Страниц / Страница63 / 3 — AD7175-2. Data. Sheet. TABLE. OF. CONTENTS. Features. .. 1. Checksum. …
ВерсияB
Формат / Размер файлаPDF / 1.1 Мб
Язык документаанглийский

AD7175-2. Data. Sheet. TABLE. OF. CONTENTS. Features. .. 1. Checksum. Protection. .. 43. Applications. ... 1. CRC. Calculation. ... 44. General. Description. ... 1

AD7175-2 Data Sheet TABLE OF CONTENTS Features . 1 Checksum Protection . 43 Applications .. 1 CRC Calculation .. 44 General Description .. 1

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Analog Devices
198 ₽
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Текстовая версия документа

AD7175-2 Data Sheet TABLE OF CONTENTS Features .. 1 Checksum Protection .. 43 Applications ... 1 CRC Calculation ... 44 General Description ... 1 Integrated Functions .. 46 Functional Block Diagram .. 1 General-Purpose Input/Output.. 46 Revision History ... 3 External Multiplexer Control ... 46 Specifications ... 4 Delay .. 46 Timing Characteristics .. 7 16-Bit/24-Bit Conversions... 46 Timing Diagrams .. 8 DOUT_RESET ... 46 Absolute Maximum Ratings .. 9 Synchronization .. 46 Thermal Resistance .. 9 Error Flags ... 47 ESD Caution .. 9 DATA_STAT ... 47 Pin Configuration and Function Descriptions ... 10 IOSTRENGTH ... 48 Typical Performance Characteristics ... 12 Internal Temperature Sensor .. 48 Noise Performance and Resolution .. 19 Grounding and Layout .. 49 Getting Started .. 20 Register Summary .. 50 Power Supplies .. 21 Register Details ... 51 Digital Communication ... 21 Communications Register ... 51 AD7175-2 Reset .. 22 Status Register ... 52 Configuration Overview ... 22 ADC Mode Register ... 53 Circuit Description ... 28 Interface Mode Register .. 54 Buffered Analog Input ... 28 Register Check .. 55 Crosspoint Multiplexer .. 28 Data Register ... 55 AD7175-2 Reference .. 29 GPIO Configuration Register ... 56 Buffered Reference Input ... 30 ID Register... 57 Clock Source ... 30 Channel Register 0 ... 57 Digital Filters ... 31 Channel Register 1 to Channel Register 3 .. 58 Sinc5 + Sinc1 Filter ... 31 Setup Configuration Register 0 .. 59 Sinc3 Filter ... 31 Setup Configuration Register 1 to Setup Configuration Register 3 ... 59 Single Cycle Settling ... 32 Filter Configuration Register 0 ... 60 Enhanced 50 Hz and 60 Hz Rejection Filters ... 36 Filter Configuration Register 1 to Filter Configuration Operating Modes .. 39 Register 3 ... 61 Continuous Conversion Mode ... 39 Offset Register 0 ... 61 Continuous Read Mode ... 40 Offset Register 1 to Offset Register 3 ... 61 Single Conversion Mode ... 41 Gain Register 0.. 61 Standby and Power-Down Modes .. 42 Gain Register 1 to Gain Register 3 ... 61 Calibration ... 42 Outline Dimensions ... 62 Digital Interface .. 43 Ordering Guide .. 62 Rev. B | Page 2 of 62
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