Datasheet AD7719 (Analog Devices)

a
Low Voltage, Low Power, Factory-Calibrated 16-/24-Bit Dual - ADC AD7719 FEATURES APPLICATIONS HIGH RESOLUTION - ADCs Sensor Measurement 2 Independent ADCs (16- and 24-Bit Resolution) Temperature Measurement Factory-Calibrated (Field Calibration Not Required) Pressure Measurement Output Settles in 1 Conversion Cycle (Single Weigh Scales Conversion Mode) Portable Instrumentation Programmable Gain Front End 4 to 20 mA Transmitters Simultaneous Sampling and Conversion of 2 Signal Sources Separate Reference Inputs for Each Channel GENERAL DESCRIPTION Simultaneous 50 Hz and 60 Hz Rejection at 20 Hz
The AD7719 is a complete analog front end for low frequency
Update Rate
measurement applications. It contains two high resolution Σ-∆
ISOURCE Select™
ADCs, switchable matched excitation current sources, low-side
24-Bit No Missing Codes—Main ADC
power switches, digital I/O port, and temperature sensor. The
13-Bit p-p Resolution @ 20 Hz, 20 mV Range
24-bit main channel with PGA accepts fully differential, unipolar,
18-Bit p-p Resolution @ 20 Hz, 2.56 V Range
and bipolar input signal ranges from 1.024 × REFIN1/128 to 1.024 × REFIN1. Signals can be converted directly from a trans-
INTERFACE
ducer without the need for signal conditioning. The 16-bit auxiliary
3-Wire Serial
channel has an input signal range of REFIN2 or REFIN2/2.
SPI®, QSPI™, MICROWIRE™, and DSP Compatible Schmitt Trigger on SCLK
The device operates from a 32 kHz crystal with an on-chip PLL generating the required internal operating frequency. The
POWER
output data rate from the part is software programmable. The
Specified for Single 3 V and 5 V Operation
peak-to-peak resolution from the part varies with the programmed
Normal: 1.5 mA Typ @ 3 V
gain and output data rate.
Power-Down: 10 A (32 kHz Crystal Running) ON-CHIP FUNCTIONS
The part operates from a single 3 V or 5 V supply. When oper-
Rail-Rail Input Buffer and PGA
ating from 3 V supplies, the power dissipation for the part is
4-Bit Digital I/O Port
4.5 mW with both ADCs enabled and 2.85 mW with only the
On-Chip Temperature Sensor
main ADC enabled in unbuffered mode. The AD7719 is housed
Dual Switchable Excitation Current Sources
in 28-lead SOIC and TSSOP packages.
Low-Side Power Switches Reference Detect Circuit FUNCTIONAL BLOCK DIAGRAM DVDD DGND REFIN1(+) REFIN1(–) XTAL1 XTAL2 AVDD IEXC1 REFERENCE OSC. AND IEXC2 200 A DETECT AD7719 PLL IOUT1 200 A DOUT IOUT2 SERIAL DIN AVDD MAIN CHANNEL INTERFACE AIN1 SCLK 24-BIT - ADC AND AIN2 CS MUX1 CONTROL BUF PGA AIN3 LOGIC RDY AIN4 AV RESET DD AGND I/O PORT AIN5 MUX MUX2 AUXILIARY CHANNEL AIN6 16-BIT - ADC TEMP SENSOR AVDD AGND REFIN2 PWRGND P1/SW1 P2/SW2 P3 P4
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE TIMING CHARACTERISTICS DIGITAL INTERFACE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics DUAL-CHANNEL ADC CIRCUIT INFORMATION Overview Main Channel Auxiliary Channel Both Channels MAIN AND AUXILIARY ADC NOISE PERFORMANCE ON-CHIP REGISTERS Communications Register (A3, A2, A1, A0 = 0, 0, 2, 0) Status Register (A3, A2, A1, A0 = 0, 0, 0, 0; Power-On Reset = 0x00) Mode Register (A3, A2, A1, A0 = 0, 0, 0, 1; Power-On Reset = 0x00) Operating Characteristics when Addressing the Mode and Control Registers Main ADC Control Register (AD0CON): (A3, A2, A1, A0 = 0, 0, 1, 0; Power-On Reset = 0x07) Aux ADC Control Registers (AD1CON): (A3, A2, A1, A0 = 0, 0, 1, 1; Power-On Reset = 0x00) Filter Register (A3, A2, A1, A0 = 0, 1, 0, 0; Power-On Reset = 0x45) I/O and Current Source Control Register (IOCON): (A3, A2, A1, A0 = 0, 1, 1, 1; Power-On Reset = 0x0000) Main ADC Data Result Registers (DATA0): (A3, A2, A1, A0 = 0, 1, 0, 1; Power-On Reset = 0x00 0000) Aux ADC Data Result Registers (DATA1): (A3, A2, A1, A0 = 0, 1, 1, 0; Power-On Reset = 0x0000) Main ADC Offset Calibration Coefficient Registers (OF0): (A3, A2, A1, A0 = 1, 0, 0, 0; Power-On Reset = 0x80 0000) Aux ADC Offset Calibration Coefficient Registers (OF1): (A3, A2, A1, A0 = 1, 0, 0, 1; Power-On Reset = 0x8000) Main ADC Gain Calibration Coefficient Registers (GNO): (A3, A2, A1, A0 = 1, 0, 1, 0; Power-On Reset = 0x5X XXX5) Aux ADC Gain Calibration Coefficient Registers (GN1): (A3, A2, A1, A0 = 1, 0, 1, 1; Power-On Reset = 0x59XX) ID Register (ID): (A3, A2, A1, A0 = 1, 1, 1, 1; Power-On Reset = 0x0X) User Nonprogrammable Test Registers CONFIGURING THE AD7719 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7719-to-68HC11 Interface AD7719-to-8xC51 Interface AD7719-to-ADSP-2103/ADSP-2105 Interface CIRCUIT DESCRIPTION Analog Input Channels Programmable Gain Amplifier Bipolar/Unipolar Configuration Data Output Coding Burnout Currents Excitation Currents Crystal Oscillator Reference Input Reference Detect Reset Input Power-Down Mode Idle Mode ADC Disable Mode Calibration Grounding and Layout APPLICATIONS Pressure Measurement Temperature Measurement 3-Wire RTD Configurations Smart Transmitters OUTLINE DIMENSIONS Revision History