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Datasheet LT1307, LT1307B (Analog Devices) - 8

ПроизводительAnalog Devices
ОписаниеSingle Cell Micropower 600kHz PWM DC/DC Converters
Страниц / Страница20 / 8 — APPLICATIO S I FOR ATIO. OPERATION. Figure 3. LT1307 Exhibits Burst Mode …
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Язык документаанглийский

APPLICATIO S I FOR ATIO. OPERATION. Figure 3. LT1307 Exhibits Burst Mode Operation Ripple at. 1mA Load, LT1307B Does Not

APPLICATIO S I FOR ATIO OPERATION Figure 3 LT1307 Exhibits Burst Mode Operation Ripple at 1mA Load, LT1307B Does Not

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LT1307/LT1307B
U U W U APPLICATIO S I FOR ATIO OPERATION
200mV. There is no hysteresis in A4, allowing it to be used as an amplifier in some applications. The entire device is The LT1307 combines a current mode, fixed frequency disabled when the SHDN pin is brought low. To enable the PWM architecture with Burst Mode micropower operation converter, SHDN must be at V to maintain high efficiency at light loads. Operation can IN or at a higher voltage. best be understood by referring to the block diagram in The LT1307B differs from the LT1307 in that there is no Figure 2. Q1 and Q2 form a bandgap reference core whose hysteresis in comparator A1. Also, the bias point on A1 is loop is closed around the output of the converter. When set lower than on the LT1307 so that switching can occur VIN is 1V, the feedback voltage of 1.22V, along with an at inductor current less than 100mA. Because A1 has no 80mV drop across R5 and R6, forward biases Q1 and Q2’s hysteresis, there is no Burst Mode operation at light loads base collector junctions to 300mV. Because this is not and the device continues switching at constant frequency. enough to saturate either transistor, FB can be at a higher This results in the absence of low frequency output voltage voltage than VIN. When there is no load, FB rises slightly ripple at the expense of efficiency. above 1.22V, causing VC (the error amplifier’s output) to The difference between the two devices is clearly illus- decrease. When VC reaches the bias voltage on hysteretic trated in Figures 3 and 4. The top two traces in Figure 3 comparator A1, A1’s output goes low, turning off all show an LT1307/LT1307B circuit, using the components circuitry except the input stage, error amplifier and low- indicated in Figure 1, set to a 5V output. Input voltage is battery detector. Total current consumption in this state is 1.25V. Load current is stepped from 1mA to 41mA for both 50µA. As output loading causes the FB voltage to de- circuits. Low frequency Burst Mode operation voltage crease, A1’s output goes high, enabling the rest of the IC. ripple is observed on Trace A, while none is observed on Switch current is limited to approximately 100mA initially after A1’s output goes high. If the load is light, the output voltage (and FB voltage) will increase until A1’s output LT1307 V goes low, turning off the rest of the LT1307. Low fre- TRACE A OUT 500mV/DIV quency ripple voltage appears at the output. The ripple AC COUPLED frequency is dependent on load current and output capaci- LT1307B VOUT tance. This Burst Mode operation keeps the output regu- TRACE B 500mV/DIV AC COUPLED lated and reduces average current into the IC, resulting in 41mA I high efficiency even at load currents of 100µA or less. L 1mA VIN = 1.25V 1ms/DIV 1307 F03 If the output load increases sufficiently, A1’s output re- VOUT = 5V mains high, resulting in continuous operation. When the
Figure 3. LT1307 Exhibits Burst Mode Operation Ripple at
LT1307 is running continuously, peak switch current is
1mA Load, LT1307B Does Not
controlled by VC to regulate the output voltage. The switch is turned on at the beginning of each switch cycle. When LT1307 the summation of a signal representing switch current and VOUT TRACE A a ramp generator (introduced to avoid subharmonic oscil- 200mV/DIV AC COUPLED lations at duty factors greater than 50%) exceeds the VC LT1307B signal, comparator A2 changes state, resetting the flip- VOUT TRACE B 200mV/DIV flop and turning off the switch. Output voltage increases as AC COUPLED switch current is increased. The output, attenuated by a 45mA IL 5mA resistor divider, appears at the FB pin, closing the overall VIN = 1.5V 500µs/DIV 1307 F04 loop. Frequency compensation is provided by an external VOUT = 5V series RC network connected between the VC pin and
Figure 4. At Higher Loading and a 1.5V Supply, LT1307
ground. Low-battery detector A4’s open collector output
Again Exhibits Burst Mode Operation Ripple at 5mA Load, LT1307B Does Not
(LBO) pulls low when the LBI pin voltage drops below 1307fa 8
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