Datasheet LTC2485 (Analog Devices) - 10

LTC2485
Typical perForMance characTerisTics PSRR vs Frequency at VCC PSRR vs Frequency at VCC (2x Speed Mode) (2x Speed Mode)
0 0 VCC = 4.1V DC ±1.4V VCC = 4.1V DC ±0.7V REF+ = 2.5V REF+ = 2.5V –20 REF– = GND –20 REF– = GND IN+ = GND IN+ = GND –40 IN– = GND –40 IN– = GND TA = 25°C TA = 25°C –60 –60 –80 –80 RREJECTION (dB) REJECTION (dB) –100 –100 –120 –120 –140 –140 0 20 40 60 80 100 120 140 160 180 200 220 30600 30650 30700 30750 30800 FREQUENCY AT VCC (Hz) FREQUENCY AT VCC (Hz) 2485 G37 2485 G38
pin FuncTions REF+ (Pin 1), REF– (Pin 3):
Differential Reference Input.
SDA (Pin 7):
Bidirectional Serial Data Line of the I2C Inter- The voltage on these pins can have any value between GND face. In the transmitter mode (Read), the conversion result and VCC as long as the reference positive input, REF+, is is output through the SDA pin, while in the receiver mode more positive than the reference negative input, REF –, (Write), the device configuration bits are input through the by at least 0.1V. SDA pin. At data input mode, the pin is high impedance;
V
while at data output mode, it is an open-drain N-channel
CC (Pin 2):
Positive Supply Voltage. Bypass to GND (Pin 8) with a 1µF tantalum capacitor in parallel with 0.1µF driver and therefore an external pull-up resistor or current ceramic capacitor as close to the part as possible. source to VCC is needed.
IN+ (Pin 4), IN– (Pin 5):
Differential Analog Input. The volt-
GND (Pin 8):
Ground. Connect this pin to a ground plane age on these pins can have any value between GND – 0.3V through a low impedance connection. and VCC + 0.3V. Within these limits the converter bipolar
CA1 (Pin 9):
Chip Address Control Pin. The CA1 pin is input range (VIN = IN+ – IN–) extends from –0.5 • VREF configured as a three state (LOW, HIGH, or Floating) ad- to 0.5 • VREF. Outside this input range the converter pro- dress control bit for the device I2C address. duces unique overrange and underrange output codes.
CA0/f0 (Pin 10):
Chip Address Control Pin/External Clock
SCL (Pin 6):
Serial Clock Pin of the I2C Interface. The Input Pin. When no transition is detected on the CA0/f0 LTC2485 can only act as a slave and the SCL pin only pin, it is a two state (HIGH or Floating) address control accepts external serial clock. Data is shifted into the bit for the device I2C address. When the pin is driven by SDA pin on the rising edges of the SCL clock and out- an external clock signal with a frequency fEOSC of at least put through the SDA pin on the falling edges of the 10kHz, the converter uses this signal as its system clock SCL clock. and the fundamental digital filter rejection null is located at a frequency fEOSC/5120 and sets the Chip Address CA0 internally to a HIGH. 2485fd 10 For more information www.linear.com/LTC2485 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics (Normal Speed) Electrical Characteristics (2x Speed) Converter Characteristics Analog Input and Reference I2C Digital Inputs and Digital Outputs Power Requirements Timing Characteristics I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts