LTC2356-12/LTC2356-14 Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown FeaturesDescription n 3.5Msps Conversion Rate The LTC®2356-12/LTC2356-14 are 12-bit/14-bit, 3.5Msps n 74.1dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits serial ADCs with differential inputs. The devices draw n Low Power Dissipation: 18mW only 5.5mA from a single 3.3V supply and come in a n 3.3V Single Supply Operation tiny 10-lead MSOP package. A Sleep shutdown feature n 2.5V Internal Bandgap Reference can be Overdriven further reduces power consumption to 13µW. The com- n 3-Wire SPI-Compatible Serial Interface bination of speed, low power and tiny package makes the n Sleep (13µW) Shutdown Mode LTC2356-12/LTC2356-14 suitable for high speed, portable n Nap (4mW) Shutdown Mode applications. n 80dB Common Mode Rejection The 80dB common mode rejection allows users to eliminate n ±1.25V Bipolar Input Range ground loops and common mode noise by measuring n Tiny 10-Lead MSOP Package signals differentially from the source. applications The devices convert –1.25V to 1.25V bipolar inputs differentially. The absolute voltage swing for A + IN and n Communications A – IN extends from ground to the supply voltage. n Data Acquisition Systems The serial interface sends out the conversion results during n Uninterrupted Power Supplies the 16 clock cycles following a CONV rising edge for com- n Multiphase Motor Control patibility with standard serial interfaces. If two additional n Multiplexed Data Acquisition clock cycles for acquisition time are allowed after the data n RFID stream in between conversions, the full sampling rate of 3.5Msps can be achieved with a 63MHz clock. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Block Diagram 10µF 3.3V THD, 2nd and 3rd vs Input Frequencyfor Differential Input Signals 7 –50 LTC2356-14 VDD –56 A + IN 1 + THREE- –62 TCH STATE S & H 14-BIT ADC THD SERIAL 8 SDO –68 2nd A – OUTPUT IN 2 – 14-BIT LA PORT –74 3rd 14 –80 VREF THD, 2nd, 3rd (dB) –86 3 10 CONV 10µF 2.5V TIMING –92 REFERENCE LOGIC GND 4 9 SCK –98 –104 2356 BD 5 6 11 EXPOSED PAD 0.1 1 10 100 FREQUENCY (MHz) 2356 G02 2356fd For more information www.linear.com/LTC2356-12 1 Document Outline Features Description Applications Block Diagram Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Applications Information Revision History Typical Application Related Parts
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