LTC2309 FunCtIOnAL BLOCK DIAGRAM VDD CH0 LTC2309 AD1 CH1 AD0 CH2 CH3 ANALOG + SCL INPUT 12-BIT I2C CH4 MUX SAR ADC – PORT SDA CH5 CH6 VREF CH7 INTERNAL 8k COM 2.5V REF GAIN = 1.6384x REFCOMP 2308 BD GND tIMInG DIAGRAM Definition of Timing for Fast/Standard Mode Devices on the I2C Bus SDA tLOW tSU(DAT) tHD(SDA) tBUF tf t t r tf SP tr SCL tHD(SDA) tSU(STA) tSU(STO) S tHD(DAT) tHIGH Sr P S 2309 TD S = START, Sr = REPEATED START, P = STOP 2309fd Document Outline Features Description Applications Absolute Maximum Ratings Pin Configuration Order Information CONVERTER AND MULTIPLEXER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS I2C Inputs and Digital Outputs POWER REQUIREMENTS I2C TIMING CHARACTERISTICS ADC TIMING CHARACTERISTICS Typical Performance Characteristics Pin Functions Functional Block Diagram TIMING DIAGRAM Applications Information Package Description Revision History Typical Application Related Parts
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