LTC2217 POWER REQUIREMENTSThe ● denotes the specifi cations which apply over the full operating temperaturerange, otherwise specifi cations are at TA = 25°C. AIN = –1dBFS unless otherwise noted. (Note 4)SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS VDD Analog Supply Voltage (Note 8) ● 3.135 3.3 3.465 V PSHDN Shutdown Power SHDN = VDD 17 mW Standard LVDS Output Mode OVDD Output Supply Voltage (Note 8) ● 3 3.3 3.6 V IVDD Analog Supply Current ● 365 430 mA IOVDD Output Supply Current ● 75 90 mA PDIS Power Dissipation ● 1450 1716 mW Low Power LVDS Output Mode OVDD Output Supply Voltage (Note 8) ● 3 3.3 3.6 V IVDD Analog Supply Current ● 363 430 mA IOVDD Output Supply Current ● 42 50 mA PDIS Power Dissipation ● 1335 1584 mW CMOS Output Mode OVDD Output Supply Voltage (Note 8) ● 0.5 3.6 V IVDD Analog Supply Current ● 360 430 mA PDIS Power Dissipation ● 1190 1420 mW TheTIMING CHARACTERISTICS ● denotes the specifi cations which apply over the full operating temperaturerange, otherwise specifi cations are at TA = 25°C. (Note 4)SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS fS Sampling Frequency (Note 8) ● 1 105 MHz tL ENC Low Time Duty Cycle Stabilizer Off (Note 7) ● 4.52 4.762 500 ns Duty Cycle Stabilizer On (Note 7) ● 3.1 4.762 500 ns tH ENC High Time Duty Cycle Stabilizer Off (Note 7) ● 4.52 4.762 500 ns Duty Cycle Stabilizer On (Note 7) ● 3.1 4.762 500 ns LVDS Output Mode (Standard and Low Power) tD ENC to DATA Delay (Note 7) ● 1.3 2.5 3.8 ns tC ENC to CLKOUT Delay (Note 7) ● 1.3 2.5 3.8 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) ● –0.6 0 0.6 ns tRISE Output Rise Time 0.5 ns tFALL Output Fall Time 0.5 ns Data Latency Data Latency 7 Cycles CMOS Output Mode tD ENC to DATA Delay (Note 7) ● 1.3 2.7 4 ns tC ENC to CLKOUT Delay (Note 7) ● 1.3 2.7 4 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) ● –0.6 0 0.6 ns Data Latency Data Latency Full Rate CMOS 7 Cycles Demuxed 7 Cycles 2217f 6