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Datasheet LTC1594L, LTC1598L (Analog Devices) - 2

ПроизводительAnalog Devices
Описание4- and 8-Channel, 3V Micropower Sampling 12-Bit Serial I/O A/D Converters
Страниц / Страница24 / 2 — ABSOLUTE MAXIMUM RATINGS. (Notes 1, 2). PACKAGE/ORDER INFORMATION. RECOM …
Формат / Размер файлаPDF / 370 Кб
Язык документаанглийский

ABSOLUTE MAXIMUM RATINGS. (Notes 1, 2). PACKAGE/ORDER INFORMATION. RECOM ENDED OPERATING CONDITIONS The

ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) PACKAGE/ORDER INFORMATION RECOM ENDED OPERATING CONDITIONS The

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Текстовая версия документа

LTC1594L/LTC1598L
W W W U ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
Supply Voltage (VCC) to GND... 12V Power Dissipation .. 500mW Voltage Operating Temperature Range Analog Reference .. – 0.3V to (VCC + 0.3V) LTC1594LCS/LTC1598LCG ... 0°C to 70°C Analog Inputs .. – 0.3V to (VCC + 0.3V) LTC1594LIS/LTC1598LIG ... – 40°C to 85°C Digital Inputs ...– 0.3V to 12V Storage Temperature Range ... – 65°C to 150°C Digital Output .. – 0.3V to (VCC + 0.3V) Lead Temperature (Soldering, 10 sec).. 300°C
U W U PACKAGE/ORDER INFORMATION
ORDER PART TOP VIEW ORDER PART NUMBER NUMBER CH5 1 24 CH4 TOP VIEW CH6 2 23 CH3 LTC1594LCS LTC1598LCG CH0 1 16 VCC CH7 3 22 CH2 LTC1594LIS LTC1598LIG CH1 2 15 MUXOUT GND 4 21 CH1 CH2 3 14 DIN CLK 5 20 CH0 CH3 4 13 CSMUX CSMUX 6 19 VCC ADCIN 5 12 CLK D 7 18 IN MUXOUT V 6 11 REF VCC COM 8 17 ADCIN COM 7 10 DOUT GND 9 16 VREF GND 8 9 CSADC CSADC 10 15 VCC D 11 14 OUT CLK S PACKAGE 16-LEAD PLASTIC SO NC 12 13 NC TJMAX = 125°C, θJA = 120°C/ W G PACKAGE 24-LEAD PLASTIC SSOP TJMAX = 150°C, θJA = 110°C/ W Consult factory for Military grade parts.
WW U U U U RECOM ENDED OPERATING CONDITIONS The

denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage (Note 3) 2.7 3.6 V fCLK Clock Frequency VCC = 2.7V (Note 4) 200 kHz tCYC Total Cycle Time fCLK = 200kHz 95 µs thDI Hold Time, DIN After CLK↑ VCC = 2.7V 450 ns tsuCS Setup Time CS↓ Before First CLK↑ (See Operating Sequence) VCC = 2.7V 2 µs tsuDI Setup Time, DIN Stable Before CLK↑ VCC = 2.7V 600 ns tWHCLK CLK High Time VCC = 2.7V 1.5 µs tWLCLK CLK Low Time VCC = 2.7V 1.5 µs tWHCS CS High Time Between Data Transfer Cycles fCLK = 200kHz 25 µs tWLCS CS Low Time During Data Transfer fCLK = 200kHz 70 µs 15948lfb 2
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