LTC4150 BLOCK DIAGRAM CHARGER LOAD REFHI VDD 1.7V S3 10 INT 8 + OFLOW/ S Q 100pF UFLOW SENSE+ 2k S1 R 1 200k – COUNTER – 9 CLR C + F 200k CONTROL UP/DN AMPLIFIER 3 LOGIC CHARGE R C SENSE F + 6 4 + POL POLARITY DETECTION C – F DISCHARGE I 200k BAT 2k 2 – SENSE– S2 REFLO 0.95V 5 SHDN GND 7 4150 F01 Figure 1. Block DiagramTIMING DIAGRAMS 50% CLR 50% tCLR INT 50% INT 50% 4150 F02 tINT 4150 F03 Figure 2. CLR Pulse Width to Reset INT,Figure 3. INT Minimum Pulse Width, CLR and INT ConnectedCLR and INT Not Connected 4150fc 6 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM TIMING DIAGRAMS OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS
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