Корпус Intersil M16.173 — Даташит

Plastic Packages for Integrated Circuits Package Outline Drawing
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 2, 5/10
A
1 3 5.00 В±0.10
SEE DETAIL "X" 9 16 6.40
PIN #1
I.D. MARK 4.40 В±0.10
2 3 0.20 C B A 1 8
B 0.65 0.09-0.20
END VIEW TOP VIEW 1.00 REF -0.05 H
C 1.20 MAX SEATING
PLANE 0.90 +0.15/-0.10
GAUGE
PLANE 0.25 +0.05/-0.06 5
0.10 M C B A 0.10 C 0В°-8В° 0.05 MIN
0.15 MAX SIDE VIEW 0.25 0.60 В±0.15
DETAIL "X" (1.45)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs. (5.65) Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side. …