Datasheet Texas Instruments 74ALVTH16601DLG4 — Даташит
Производитель | Texas Instruments |
Серия | SN74ALVTH16601 |
Модель | 74ALVTH16601DLG4 |
18-битный универсальный шинный приемопередатчик 2,5 В/3,3 В с выходами с 3 состояниями 56-SSOP от -40 до 85
Datasheets
2.5-V/3.3-V 18-Bit Universal Bus Transceiver With 3-State Outputs datasheet
PDF, 462 Кб, Версия: A, Файл опубликован: 12 июл 1999
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Цены
Купить 74ALVTH16601DLG4 на РадиоЛоцман.Цены — от 267 до 390 ₽ 12 предложений от 8 поставщиков 2.5V/3.3V 18Bit Universal Bus Transceiver With 3-State Outputs 56-SSOP -40℃ to 85℃ | |||
74ALVTH16601DLG4 Texas Instruments | от 267 ₽ | ||
74ALVTH16601DLG4 Texas Instruments | 284 ₽ | ||
74ALVTH16601DLG4 Texas Instruments | 306 ₽ | ||
74ALVTH16601DLG4 Texas Instruments | по запросу |
Статус
Статус продукта | В производстве (Рекомендуется для новых разработок) |
Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
Pin | 56 |
Package Type | DL |
Industry STD Term | SSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 20 |
Carrier | TUBE |
Маркировка | ALVTH16601 |
Width (мм) | 7.49 |
Length (мм) | 18.41 |
Thickness (мм) | 2.59 |
Pitch (мм) | .635 |
Max Height (мм) | 2.79 |
Mechanical Data | Скачать |
Параметры
Bits | 18 |
F @ Nom Voltage(Max) | 160 Mhz |
ICC @ Nom Voltage(Max) | 5 мА |
Рабочий диапазон температур | от -40 до 85 C |
Output Drive (IOL/IOH)(Max) | -24/24,-32/64 мА |
Package Group | SSOP |
Package Size: mm2:W x L | 56SSOP: 191 mm2: 10.35 x 18.42(SSOP) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | ALVT |
VCC(Max) | 3.6 В |
VCC(Min) | 2.3 В |
Voltage(Nom) | 2.5,3.3 В |
tpd @ Nom Voltage(Max) | 4.8,3.9 нс |
Экологический статус
RoHS | Совместим |
Application Notes
- Advanced Low-Voltage TechnologyPDF, 59 Кб, Файл опубликован: 27 июл 1999
ALVT, the advanced low-voltage logic family, offers high-performance BiCMOS devices that are functional at 3.3-V and 2.5-V V sub CC and have low propagation delay, low static-power consumption, and 64 mA current drive. Other features include 5-V tolerance; auto3-state; bus hold; partial power down, hot insertion, and live insertion; and excellent simultaneous-switching and output-skew performance. - Bus-Hold CircuitPDF, 418 Кб, Файл опубликован: 5 фев 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)PDF, 154 Кб, Версия: A, Файл опубликован: 8 сен 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families - Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Кб, Файл опубликован: 10 май 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features - TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Кб, Файл опубликован: 29 авг 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
Модельный ряд
Серия: SN74ALVTH16601 (5)
- 74ALVTH16601DLG4 SN74ALVTH16601DL SN74ALVTH16601DLR SN74ALVTH16601GR SN74ALVTH16601VR
Классификация производителя
- Semiconductors > Logic > Universal Bus Function > Universal Bus Transceiver (UBT)