Datasheet Texas Instruments DRA746 — Даташит
Производитель | Texas Instruments |
Серия | DRA746 |
Двойной процессор SoC A15 с тактовой частотой 1,5 ГГц для информационно-развлекательных систем
Datasheets
DRA75x, DRA74x Infotainment Applications Processor Silicon Revision 2.0 datasheet
PDF, 7.1 Мб, Версия: C, Файл опубликован: 6 июн 2017
Выписка из документа
Цены
Dual 1.5 GHz Arm Cortex-A15 SoC processor with graphics & DSP for automotive infotainment & cluster 760-FCBGA | |||
DRA746APGABCQ1 Texas Instruments | по запросу | ||
DRA746APGABCRQ1 Texas Instruments | по запросу | ||
DRA746BPGABCQ1 Texas Instruments | по запросу | ||
DRA746APGABCRQ1 Texas Instruments | по запросу |
Статус
DRA746APGABCQ1 | DRA746BPGABCQ1 | DRA746BPGABCRQ1 | |
---|---|---|---|
Статус продукта | В производстве | Анонсирован | Анонсирован |
Доступность образцов у производителя | Нет | Нет | Нет |
Корпус / Упаковка / Маркировка
DRA746APGABCQ1 | DRA746BPGABCQ1 | DRA746BPGABCRQ1 | |
---|---|---|---|
N | 1 | 2 | 3 |
Pin | 760 | 760 | 760 |
Package Type | ABC | ABC | ABC |
Industry STD Term | FCBGA | FCBGA | FCBGA |
JEDEC Code | S-PBGA-N | S-PBGA-N | S-PBGA-N |
Package QTY | 60 | 60 | 250 |
Маркировка | DRA746APGABCQ1 | DRA746BPGABCQ1 | DRA746BPGABCQ1 |
Width (мм) | 23 | 23 | 23 |
Length (мм) | 23 | 23 | 23 |
Thickness (мм) | 2.39 | 2.39 | 2.39 |
Pitch (мм) | .8 | .8 | .8 |
Max Height (мм) | 2.96 | 2.96 | 2.96 |
Mechanical Data | Скачать | Скачать | Скачать |
Carrier | EIAJ TRAY (5+1) | LARGE T&R |
Параметры
Parameters / Models | DRA746APGABCQ1 | DRA746BPGABCQ1 | DRA746BPGABCRQ1 |
---|---|---|---|
ARM CPU | 2 ARM Cortex-A15 | 2 ARM Cortex-A15 | 2 ARM Cortex-A15 |
ARM MHz, Max. | 1500 | 1500 | 1500 |
Co-Processor, s | 2 ARM Cortex-M4 | 2 ARM Cortex-M4 | 2 ARM Cortex-M4 |
DSP | 1 C66x | 1 C66x | 1 C66x |
DSP MHz, Max. | 700 | 700 | 700 |
Display Options | 1 HDMI OUT,3 LCD OUT | 1 HDMI OUT,3 LCD OUT | 1 HDMI OUT,3 LCD OUT |
EMAC | 10/100/1000,2-port 1Gb switch | 10/100/1000,2-port 1Gb switch | 10/100/1000,2-port 1Gb switch |
EMIF | 2 DDR2,2 DDR3,2 DDR3L | 2 DDR2,2 DDR3,2 DDR3L | 2 DDR2,2 DDR3,2 DDR3L |
Graphics Acceleration | 1 2D,2 3D | 1 2D,2 3D | 1 2D,2 3D |
Hardware Accelerators | 1 Image Video Accelerator,2 Viterbi Decoder,Audio Tracking | 1 Image Video Accelerator,2 Viterbi Decoder,Audio Tracking | 1 Image Video Accelerator,2 Viterbi Decoder,Audio Tracking |
MMC/SD | 1x SDIO 4b,1x SDIO 8b,1x UHSI 4b,1x eMMC 8b | 1x SDIO 4b,1x SDIO 8b,1x UHSI 4b,1x eMMC 8b | 1x SDIO 4b,1x SDIO 8b,1x UHSI 4b,1x eMMC 8b |
McASP | 8 | 8 | 8 |
Other On-Chip Memory | 512 KB | 512 KB | 512 KB |
PCIe | 1 PCIe Gen2 | 1 PCIe Gen2 | 1 PCIe Gen2 |
Serial I/O | CAN,I2C,SPI,UART,USB | CAN,I2C,SPI,UART,USB | CAN,I2C,SPI,UART,USB |
USB | 1 USB3.0,3 USB2.0 | 1 USB3.0,3 USB2.0 | 1 USB3.0,3 USB2.0 |
Video Input Ports | 6 | 6 | 6 |
Экологический статус
DRA746APGABCQ1 | DRA746BPGABCQ1 | DRA746BPGABCRQ1 | |
---|---|---|---|
RoHS | Совместим | Совместим | Совместим |
Application Notes
- Modifying Memory Usage for IPUMM Applications Loaded IPC 3.x for DRA75x, DRA74x (Rev. A)PDF, 78 Кб, Версия: A, Файл опубликован: 15 янв 2016
The default Image Processing Unit (IPU) image for DRA7xx IPU provides numerous capabilities for a rich multimedia experience. However, not all customers will want to use all of the capabilities, or may wish to add new capabilities. If not all of the capabilities are used, then the memory usage can be reduced. Similarly, if new capabilities are added, the memory usage can be increased.This d - Flashing Binaries to DRA7xx Factory Boards Using DFUPDF, 42 Кб, Файл опубликован: 14 апр 2016
This application report provides detailed procedures for flashing the binary images to eMMC Flash memory using Device Firmware Upgrade (DFU). Generally, the MMC/SD boot mode can be used to boot the fresh production board/EVM. In case there is not an external MMC/SD card available as part of production EVM or final product, this application report will be useful to flash the images to the factory b - Early Splash Screen on DRA7x DevicesPDF, 721 Кб, Файл опубликован: 31 янв 2017
This application report provides information on how to display a splash screen as soon as possible on the DRA7xx devices and perform a glitch-free transition from the splash screen to the full system UI. The steps in this document are demonstrated using U-Boot and Linux kernel. The same steps can be applied to other bootloaders and operating systems. - Interfacing DRA75x and DRA74x Audio to Analog Codecs (Rev. A)PDF, 57 Кб, Версия: A, Файл опубликован: 17 фев 2017
DRA7xx Infotainment Application Processor offers an audio solution based on the multichannel audio serial port (McASP). McASP is a very flexible interface capable of interfacing with audio devices using protocols like Inter-IC Sound (I2S), PCM, TDM, S/PDIF. DRA7xx audio solution at LinuxВ® kernel level uses ALSA System-on-Chip (ASoC) layer with independent drivers for the DMA engine, CPU-side audio - DRA74x_75x/DRA72x PerformancePDF, 6.6 Мб, Файл опубликован: 17 июн 2016
This application report provides information on the DRA74x_75x and DRA72x device throughput performances and describes the DRA74x_75x and DRA72x System-on-Chip (SoC) architecture, data path infrastructure, and constraints that affect the throughput and different optimization techniques for optimum system performance. This document also provides information on the maximum possible throughput perfor - Tools and Techniques for Audio DebuggingPDF, 409 Кб, Файл опубликован: 13 апр 2016
Debugging audio issues can be a challenging task due to the dynamic nature of the audio systems, in terms of runtime routing flexibility, gain control, and so forth. Investigating the root cause of system level issues is a difficult task without the appropriate tools and techniques.This document discusses some of the available tools for debugging audio issues. These tools span from TI-speci - Gstreamer Migration GuidelinesPDF, 229 Кб, Файл опубликован: 26 апр 2016
Gstreamer is a widely used multimedia framework. It is supported by GLSDK. New versions of gstreamer come out every month with a lot of bug fixes. The examples and steps are based on Gst 0.10 to Gst 1.2 migration. Anyone who wants to adapt to a newer or older version can use this as a guideline.The steps for creating and building a recipe are based on the yocto setup. The migration steps ar - Android Boot Optimization for IVI SystemsPDF, 51 Кб, Файл опубликован: 29 фев 2016
Boot-time optimizations are a critical component for a better Auto infotainment experience. This application report captures the details on how to improve android boot time and is meant to be a reference implementation. The end user (OEM/ODM/Customer/Product Owner) can review the optimizations that were tried and make a choice for the final product accordingly. - Using Peripheral Boot and DFU for Rapid Development on Jacinto 6 DevicesPDF, 49 Кб, Файл опубликован: 15 фев 2017
This application report describes how to use peripheral boot and Device Firmware Upgrade (DFU) to reduce the time required to load updated binaries to various cores of a Jacinto 6 (DRA7xx) family device. - Debugging Tools and Techniques With IPC3.xPDF, 353 Кб, Файл опубликован: 30 мар 2016
There are several useful tools and techniques that enable you to debug issues encountered when using software that leverages IPC3.x. With some guidance on the tools and techniques, you can confidently debug the IPC and the remote core software.This application report guides the customers on the tools and techniques for debugging with IPC3.x - ECC/EDC on TDAxx (Rev. A)PDF, 109 Кб, Версия: A, Файл опубликован: 5 июл 2017
TDA2x and TDA3x series of automotive processor are designed to be used in automotive safety systems. To enable safety, these processors come with error detection and correction (EDC) support for various memories. This application report provides an overview and usage description of EDC. - Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A)PDF, 148 Кб, Версия: A, Файл опубликован: 15 дек 2016
This application report lists various quality-of-service (QoS) knobs that are implemented in DRA74x, DRA75x and TDA2x system-on-chip (SoC) family of devices. These QoS knobs aid to optimize overall system performance while running several concurrent application scenarios. - Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x DevicePDF, 612 Кб, Файл опубликован: 13 авг 2014
This application report provides a methodology through which performance issues can be identified and fixed in systems using DRA74x, DRA75x, TDA2x and TDA3x family of devices. - A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. A)PDF, 3.2 Мб, Версия: A, Файл опубликован: 19 авг 2016
Being able to look into the state of the device when an application fails to run as expected is a key enabler while debugging the application. This application report walks through the different steps required to setup the TI Code Composer Studioв„ў (CCS), as well as how to debug applications on the DRA7x, TDA2x and TDA3x family of devices. The document starts with describing basic CCS debugging tec
Модельный ряд
Серия: DRA746 (3)
Классификация производителя
- Semiconductors> Processors> Automotive Processors> DRAx Infotainment SoCs