Datasheet Texas Instruments CDCVF2310PWRG4 — Даташит

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SCAS666D – JUNE 2001 – REVISED OCTOBER 2015 CDCVF2310 2.5-V to 3.3-V High-Performance Clock Buffer
1 Features 3 Description The CDCVF2310 device is a high-performance, lowskew clock buffer that operates up to 200 MHz. Two
banks of five outputs each provide low-skew copies
of CLK. After power up, the default state of the
outputs is low regardless of the state of the control
pins. For normal operation, the outputs of bank
1Y[0:4] or 2Y[0:4] can be placed in a low state when
the control pins (1G or 2G, respectively) are held low
and a negative clock edge is detected on the CLK
input. The outputs of bank 1Y[0:4] or 2Y[0:4] can be
switched into the buffer mode when the control pins
(1G and 2G) are held high and a negative clock edge
is detected on the CLK input. The device operates in
a 2.5-V and 3.3-V environment. The built-in output
enable glitch suppression ensures a synchronized
output enable sequence to distribute full period clock
signals. 1 High-Performance 1:10 Clock Driver …