Datasheet Texas Instruments ADS5484 — Даташит
Производитель | Texas Instruments |
Серия | ADS5484 |
16-битный аналого-цифровой преобразователь (АЦП) с быстродействием 170 MSPS
Datasheets
16-Bit, 170/200-MSPS Analog-to-Digital Converters datasheet
PDF, 2.4 Мб, Версия: C, Файл опубликован: 8 окт 2009
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Цены
Купить ADS5484 на РадиоЛоцман.Цены — от 80 до 5 869 939 ₽ 23 предложений от 21 поставщиков Аналого-цифровые преобразователи (АЦП) 16B,170MSPS ADC w/ buffered inputs | |||
ADS5484IRGCR Texas Instruments | 80 ₽ | ||
ADS5484IRGC25 Texas Instruments | 12 303 ₽ | ||
ADS5484IRGCR Texas Instruments | по запросу | ||
ADS5484_2 Texas Instruments | по запросу |
Статус
ADS5484IRGCT | |
---|---|
Статус продукта | В производстве |
Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
ADS5484IRGCT | |
---|---|
N | 1 |
Pin | 64 |
Package Type | RGC |
Industry STD Term | VQFN |
JEDEC Code | S-PQFP-N |
Package QTY | 250 |
Carrier | SMALL T&R |
Маркировка | AZ5484 |
Width (мм) | 9 |
Length (мм) | 9 |
Thickness (мм) | .88 |
Pitch (мм) | .5 |
Max Height (мм) | 1 |
Mechanical Data | Скачать |
Параметры
Parameters / Models | ADS5484IRGCT |
---|---|
# Input Channels | 1 |
Analog Input BW, МГц | 730 |
Архитектура | Pipeline |
DNL(Max), +/-LSB | 1 |
DNL(Typ), +/-LSB | 0.5 |
ENOB, Bits | 12.05 |
INL(Max), +/-LSB | 10 |
INL(Typ), +/-LSB | 3 |
Input Buffer | Yes |
Input Range, Vp-p | 3 |
Interface | Parallel LVDS |
Рабочий диапазон температур, C | от -40 до 85 |
Package Group | VQFN |
Package Size: mm2:W x L, PKG | 64VQFN: 81 mm2: 9 x 9(VQFN) |
Power Consumption(Typ), mW | 2160 |
Rating | Catalog |
Reference Mode | Ext,Int |
Разрешение, Bits | 16 |
SFDR, дБ | 87 |
SINAD, дБ | 74.3 |
SNR, дБ | 75.7 |
Sample Rate(Max), MSPS | 170 |
Экологический статус
ADS5484IRGCT | |
---|---|
RoHS | Совместим |
Application Notes
- Input Impedance Measurement Using ADC FFT DataPDF, 275 Кб, Файл опубликован: 11 янв 2011
Texas Instruments has introduced a family of high-speed analog-to-digital converters (ADCs) suited tomeet the demand for high-speed and high-IF sampling systems. To achieve the highest overall system performance, an analog front-end circuit with an antialiasing filter must drive the ADC with the highestpossible dynamic range and lowest distortions. One important parameter of the front-end circ - High-Speed Analog-to-Digital Converter BasicsPDF, 1.1 Мб, Файл опубликован: 11 янв 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil - QFN Layout GuidelinesPDF, 1.3 Мб, Файл опубликован: 28 июл 2006
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- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Мб, Версия: A, Файл опубликован: 19 июл 2013
- Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Кб, Файл опубликован: 28 апр 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Кб, Файл опубликован: 8 июн 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015
Модельный ряд
Серия: ADS5484 (1)
Классификация производителя
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)