Datasheet Texas Instruments ADS62P23IRGCT — Даташит
| Производитель | Texas Instruments |
| Серия | ADS62P23 |
| Модель | ADS62P23IRGCT |
Двухканальный 12-разрядный аналого-цифровой преобразователь (АЦП) с быстродействием 80 MSPS 64-VQFN от -40 до 85
Datasheets
Dual Channel, 12Bit, 125/105/80/65 MSPS ADC with DDR LVDS/CMOS Outputs datasheet
PDF, 2.0 Мб, Версия: C, Файл опубликован: 11 май 2011
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Цены
 Купить ADS62P23IRGCT на РадиоЛоцман.Цены — от 2 914 до 294 440 ₽19 предложений от 15 поставщиков Analog to Digital Converter Dual 12Bit 80MSPS ADC with selectable DDR LVDS or CMOS outputs Dual ADC Pipelined 80MSPS 12Bit Parallel/Serial/LVDS... | |||
| ADS62P23IRGCT Texas Instruments | 2 914 ₽ | ||
| ADS62P23IRGCT REEL (ADS62P23IRGCT REEL) Texas Instruments | 3 845 ₽ | ||
| ADS62P23IRGCT REEL Texas Instruments | 4 182 ₽ | ||
| ADS62P23IRGCT Rochester Electronics | по запросу | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 64 |
| Package Type | RGC |
| Industry STD Term | VQFN |
| JEDEC Code | S-PQFP-N |
| Package QTY | 250 |
| Carrier | SMALL T&R |
| Маркировка | AZ62P23 |
| Width (мм) | 9 |
| Length (мм) | 9 |
| Thickness (мм) | .88 |
| Pitch (мм) | .5 |
| Max Height (мм) | 1 |
| Mechanical Data | Скачать |
Параметры
| # Input Channels | 2 |
| Analog Input BW | 450 МГц |
| Архитектура | Pipeline |
| DNL(Max) | 0.75 +/-LSB |
| DNL(Typ) | 0.3 +/-LSB |
| ENOB | 11.4 Bits |
| INL(Max) | 2 +/-LSB |
| INL(Typ) | 0.6 +/-LSB |
| Input Buffer | No |
| Input Range | 2 Vp-p |
| Interface | DDR LVDS,Parallel CMOS |
| Рабочий диапазон температур | от -40 до 85 C |
| Package Group | VQFN |
| Package Size: mm2:W x L | 64VQFN: 81 mm2: 9 x 9(VQFN) PKG |
| Power Consumption(Typ) | 587 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Разрешение | 12 Bits |
| SFDR | 88 дБ |
| SINAD | 70.8 дБ |
| SNR | 71.2 дБ |
| Sample Rate(Max) | 80 MSPS |
Экологический статус
| RoHS | Совместим |
Комплекты разработчика и оценочные наборы
- Evaluation Modules & Boards: TSW1405EVM
Data Capture: Data Converter EVMs With 8 LVDS Lanes up to 1.0Gbps
Статус продукта: В производстве (Рекомендуется для новых разработок) - Evaluation Modules & Boards: ADS62P23EVM
ADS62P23 Dual-Channel, 12-Bit, 80-MSPS Analog-to-Digital Converter Evaluation Module
Статус продукта: В производстве (Рекомендуется для новых разработок) - Evaluation Modules & Boards: ADS62P43EVM
ADS62P43 Dual-Channel, 14-Bit, 80-MSPS Analog-to-Digital Converter Evaluation Module
Статус продукта: В производстве (Рекомендуется для новых разработок) - Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Статус продукта: В производстве (Рекомендуется для новых разработок)
Application Notes
- Band-Pass Filter Design Techniques for High-Speed ADCsPDF, 733 Кб, Файл опубликован: 27 фев 2012
Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the - QFN Layout GuidelinesPDF, 1.3 Мб, Файл опубликован: 28 июл 2006
Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs. - CDCE62005 as Clock Solution for High-Speed ADCsPDF, 805 Кб, Файл опубликован: 4 сен 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements - Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Мб, Версия: A, Файл опубликован: 19 июл 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Мб, Версия: A, Файл опубликован: 22 май 2015
- Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Кб, Файл опубликован: 28 апр 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Кб, Файл опубликован: 8 июн 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015
Модельный ряд
Серия: ADS62P23 (2)
- ADS62P23IRGCR ADS62P23IRGCT
Классификация производителя
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)
