Datasheet Texas Instruments ADS54RF63IPFP — Даташит
| Производитель | Texas Instruments |
| Серия | ADS54RF63 |
| Модель | ADS54RF63IPFP |
12-разрядный аналого-цифровой преобразователь (АЦП) с частотой дискретизации 550 MSPS 80-HTQFP от -40 до 85
Datasheets
12-Bit 500-/550-MSPS Analog-to-Digital Converters datasheet
PDF, 2.0 Мб, Версия: E, Файл опубликован: 1 июл 2009
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Цены
 Купить ADS54RF63IPFP на РадиоЛоцман.Цены — от 18 105 до 2 013 919 ₽17 предложений от 13 поставщиков TEXAS INSTRUMENTS ADS54RF63IPFP Analog to Digital Converter, 12Bit, 550MSPS, 3.3V, 5V, QFP | |||
| ADS54RF63IPFP Texas Instruments | 18 105 ₽ | ||
| ADS54RF63IPFP Texas Instruments | 49 836 ₽ | ||
| ADS54RF63IPFP | по запросу | ||
| ADS54RF63IPFP Texas Instruments | по запросу | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 80 |
| Package Type | PFP |
| Industry STD Term | HTQFP |
| JEDEC Code | S-PQFP-G |
| Package QTY | 96 |
| Carrier | JEDEC TRAY (10+1) |
| Маркировка | ADS54RF63I |
| Width (мм) | 12 |
| Length (мм) | 12 |
| Thickness (мм) | 1 |
| Pitch (мм) | .5 |
| Max Height (мм) | 1.2 |
| Mechanical Data | Скачать |
Параметры
| # Input Channels | 1 |
| Analog Input BW | 2300 МГц |
| Архитектура | Pipeline |
| DNL(Max) | 0.95 +/-LSB |
| DNL(Typ) | 0.5 +/-LSB |
| ENOB | 9.9 Bits |
| INL(Max) | 2.5 +/-LSB |
| INL(Typ) | 0.7 +/-LSB |
| Input Buffer | Yes |
| Input Range | 2.2 Vp-p |
| Interface | Parallel LVDS |
| Рабочий диапазон температур | от -40 до 85 C |
| Package Group | HTQFP |
| Package Size: mm2:W x L | 80HTQFP: 196 mm2: 14 x 14(HTQFP) PKG |
| Power Consumption(Typ) | 2250 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Разрешение | 12 Bits |
| SFDR | 76 дБ |
| SINAD | 61.3 дБ |
| SNR | 62.6 дБ |
| Sample Rate(Max) | 550 MSPS |
Экологический статус
| RoHS | Совместим |
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Статус продукта: В производстве (Рекомендуется для новых разработок)
Application Notes
- Clock jitter analyzed in the time domain, Part 1PDF, 302 Кб, Файл опубликован: 11 авг 2010
- Clock jitter analyzed in the time domain, Part 2PDF, 588 Кб, Файл опубликован: 15 ноя 2010
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- High-Speed Analog-to-Digital Converter BasicsPDF, 1.1 Мб, Файл опубликован: 11 янв 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil - 3Q 2011 Issue Analog Applications JournalPDF, 1.4 Мб, Файл опубликован: 16 сен 2011
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- CDCE62005 as Clock Solution for High-Speed ADCsPDF, 805 Кб, Файл опубликован: 4 сен 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements - Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Кб, Файл опубликован: 28 апр 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
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Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015
Модельный ряд
Серия: ADS54RF63 (2)
- ADS54RF63IPFP ADS54RF63IPFPR
Классификация производителя
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)
