Datasheet Texas Instruments CD74ACT109EE4 — Даташит
| Производитель | Texas Instruments |
| Серия | CD74ACT109 |
| Модель | CD74ACT109EE4 |
Двойные триггеры JK с положительным фронтом, установкой и сбросом 16-PDIP от -55 до 125
Datasheets
CD54ACT109, CD74ACT109 datasheet
PDF, 878 Кб, Файл опубликован: 24 янв 2003
Выписка из документа
Цены
Купить CD74ACT109EE4 на РадиоЛоцман.Цены — от 22 до 58 ₽ 7 предложений от 7 поставщиков Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | |||
| CD74ACT109EE4 Texas Instruments | 22 ₽ | ||
| CD74ACT109EE4 Texas Instruments | 24 ₽ | ||
| CD74ACT109EE4 Texas Instruments | 58 ₽ | ||
| CD74ACT109EE4 Texas Instruments | по запросу | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 16 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Package QTY | 25 |
| Carrier | TUBE |
| Маркировка | CD74ACT109E |
| Width (мм) | 6.35 |
| Length (мм) | 19.3 |
| Thickness (мм) | 3.9 |
| Pitch (мм) | 2.54 |
| Max Height (мм) | 5.08 |
| Mechanical Data | Скачать |
Параметры
| Bits | 2 |
| F @ Nom Voltage(Max) | 90 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 мА |
| Output Drive (IOL/IOH)(Max) | -24/24 мА |
| Package Group | PDIP |
| Package Size: mm2:W x L | See datasheet (PDIP) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ACT |
| VCC(Max) | 5.5 В |
| VCC(Min) | 4.5 В |
| Voltage(Nom) | 5 В |
| tpd @ Nom Voltage(Max) | 11.1 нс |
Экологический статус
| RoHS | Совместим |
| Бессвинцовая технология (Pb Free) | Да |
Application Notes
- Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Кб, Версия: A, Файл опубликован: 22 июн 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Кб, Версия: A, Файл опубликован: 6 фев 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Кб, Файл опубликован: 1 апр 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Модельный ряд
Серия: CD74ACT109 (6)
- CD74ACT109E CD74ACT109EE4 CD74ACT109M CD74ACT109M96 CD74ACT109M96E4 CD74ACT109ME4
Классификация производителя
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop
